Vertical-type nonvolatile memory device and method of manufacturing the same

A vertical-type nonvolatile memory device comprising:

• a cell region including a device region, a dummy region and an isolation insulating layer,
• wherein the cell region includes a plurality of gate electrodes and a plurality of first interlayer insulating layers that are vertically and alternately stacked on each other and a first vertical channel structure,
• wherein the gate electrodes are in contact with the first vertical channel structure,
• wherein the dummy region is adjacent to one side of the device region, and the dummy region includes a plurality of conductive layers and a plurality of second interlayer insulating layers that are vertically and alternately stacked on each other and a second vertical channel structure,
• wherein the conductive layers are in contact with the second vertical channel structure,
• wherein a material of the plurality of conductive layers is different from a material of the plurality of gate electrodes,
• wherein a material of the plurality of first interlayer insulating layers is substantially the same as a material of the plurality of second interlayer insulating layer,
• wherein the isolation insulating layer is interposed between the device region and the dummy region.