Method of making embedded memory device with silicon-on-insulator substrate

A method of forming a semiconductor device, comprising:

• providing a substrate that includes silicon, a first insulation layer directly over the silicon, and a layer of silicon directly over the first insulation layer;
• performing an etch process to remove the layer of silicon and the insulation layer from a second area of the substrate, while maintaining the first insulation layer and the layer of silicon in a first area of the substrate;
• forming a second layer of insulation over the layer of silicon in the first area of the substrate and over the silicon in the second area of the substrate;
• forming a first plurality of trenches in the first area of the substrate that each extends through the second layer of insulation, the layer of silicon, and the first insulation layer, and extends into the silicon;
• forming a second plurality of trenches in the second area of the substrate that each extends through the second layer of insulation, and extends into the silicon;
• forming insulation material in the first plurality of trenches and the second plurality of trenches;
• forming logic devices in the first area of the substrate, wherein the forming of each of the logic devices includes:
• forming spaced apart source and drain regions in the layer of silicon, and
• forming a conductive gate over and insulated from a portion of the layer of silicon and between the source and drain regions;
• forming memory cells in the second area of the substrate, wherein the forming of each of the memory cells includes:
• forming spaced apart second source and second drain regions in the silicon and defining a channel region therebetween,
• forming a floating gate over and insulated from a first portion of the channel region,
• forming a select gate over and insulated from a second portion of the channel region, and
• forming an erase gate over and insulated from the second source region;
• wherein the forming of the conductive gates, the select gates and the erase gates further comprises:
• forming a first layer of polysilicon in the first and second areas of the substrate;
• forming a third layer of insulation that is disposed on the first layer of polysilicon in the first area of the substrate but not disposed on the first layer of polysilicon in the second area of the substrate;
• forming a second layer of polysilicon that is disposed on the third layer of insulation in the first area of the substrate and disposed on the first layer of polysilicon in the second area of the substrate;
• performing a polysilicon etch that removes the second layer of polysilicon from the first and second areas of the substrate, and selectively removes portions of the first layer of polysilicon in the second area of the substrate to leave blocks thereof that constitute the erase gates and the select gates;
• and
• performing a second polysilicon etch that selectively removes portions of the first layer of polysilicon in the first area of the substrate to leave blocks thereof that constitute the conductive gates.