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US 9,431,374 B2Granted
Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsBaik-Woo Lee, Seok-Hyun Lee
Life of this patent
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Abstract
A semiconductor device includes a substrate having a first part and a second part, the first and second parts being continuous with each other and at different height levels, a first semiconductor chip overlapping the first and second parts of the substrate, an electrical interconnection structure connecting the first part of the substrate and the first semiconductor chip, a distance between the first part of the substrate and the first semiconductor chip being shorter than a distance between the second part of the substrate and the first semiconductor chip, and at least one electronic component in a space between the second part of the substrate and the first semiconductor chip.
Claims19
A semiconductor device, comprising:
- a substrate having a first part, a second part, and an inclined part between the first and second parts, the first and second parts being at different height levels, and the inclined part connecting the first part to the second part, and being continuous with each of the first and second parts;
- a first semiconductor chip overlapping the first part through a central part of the first semiconductor chip, and overlapping the second part and the inclined part;
- an electrical interconnection structure connecting the first part of the substrate and the first semiconductor chip, a distance between the first part of the substrate and the first semiconductor chip being shorter than a distance between the second part of the substrate and the first semiconductor chip;
- and
- at least one electronic component in a space between the second part of the substrate and the first semiconductor chip.
2 more elements
A semiconductor package, comprising:
- a lower semiconductor chip on a lower substrate;
- an upper substrate over the lower substrate, the upper substrate having a first part, a second part, and an inclined part between the first and second parts, the first and second parts being at different height levels, and the inclined part connecting the first part to the second part, and being continuous with each of the first and second parts;
- an upper semiconductor chip on the upper substrate;
- a first electrical interconnection structure connecting the first part of the upper substrate and the upper semiconductor chip
- a second electrical interconnection structure connecting the second part of the upper substrate to the lower substrate;
- and
- at least one electronic component on the second part of the upper substrate,
- wherein the second part of the upper substrate has an upper surface located closer to the lower substrate than an upper surface of the first part of the upper substrate,
- wherein the lower semiconductor chip is between the lower substrate and the first part of the upper substrate, and
- wherein the lower semiconductor chip does not overlap the second part of the upper substrate.
7 more elements
A semiconductor package, comprising:
- a lower semiconductor chip on a lower substrate;
- an upper substrate over the lower substrate, the upper substrate having a first part, a second part, and an inclined part between the first and second parts, the first and second parts being at different height levels, and the inclined part connecting the first part to the second part, and being continuous with each of the first and second parts;
- an upper semiconductor chip overlapping the first part through a central part of the first semiconductor chip, and overlapping the second part and the inclined part;
- a first electrical interconnection structure connecting the first part of the upper substrate and the upper semiconductor chip, a distance between the first part of the upper substrate and the upper semiconductor chip being shorter than a distance between the second part of the upper substrate and the upper semiconductor chip;
- a second electrical interconnection structure connecting the second part of the upper substrate to the lower substrate, the upper semiconductor chip overlapping at least part of the second electrical interconnection structure;
- and
- a space between an upper surface of the second part of the upper substrate and a bottom surface of a peripheral part of the upper semiconductor chip,
- wherein the first part and the inclined part of the upper substrate define a recess relative to a bottom surface of the second part of the upper substrate, the recess facing the lower substrate, and the lower semiconductor chip extending into the recess to overlap the center of the first semiconductor chip.
5 more elements
Dependencies are inferred from the claim text.