Multi-chip package assembly with improved bond wire separation
AssigneeCypess Semiconductor Corporation
InventorsKiah Ling Tan, Sally Yin Lye Foong, Lee Changhak, Chin Nguk Lai
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AssigneeCypess Semiconductor Corporation
InventorsKiah Ling Tan, Sally Yin Lye Foong, Lee Changhak, Chin Nguk Lai
Estimating the term…
A multi-chip package is disclosed that has a construction capable of preventing and/or reducing electrical shorts caused by shifts in bond wires. The multi-chip package includes a die attach formed between connection points of a bond wire. The die attach is made of a non-conductive material and can be constructed so as to support or encompass a portion of the bond wire. By contacting the bond wire, the die attach restricts the motion of the bond wire by acting as a physical barrier to the bond wire's movement and/or as a source of friction. In this manner, undesired position shifts of the bond wires can be prevented, reducing device failures and allowing for improved manufacturing allowances.
A multi-chip package, comprising:
A multi-chip package, comprising:
Dependencies are inferred from the claim text.