Bypass capacitor circuit and method of providing a bypass capacitance for an integrated circuit die
AssigneeFreescale Semiconductor, Inc.
InventorsMichael Priel, Leonid Fleshel, Anton Rozen
Life of this patent
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AssigneeFreescale Semiconductor, Inc.
InventorsMichael Priel, Leonid Fleshel, Anton Rozen
Estimating the term…
A bypass capacitor circuit for an integrated circuit (IC) comprises one or more capacitive devices, each arranged in a segment of a seal ring area of a die, which comprises the IC. A method of providing a bypass capacitance for an IC comprises providing a semiconductor wafer device comprising a plurality of dies, each comprising an IC; arranging one or more capacitive devices in a seal ring area of at least one of the IC; dicing the semiconductor wafer device; in a test mode, for each of the one or more capacitive devices, enabling the capacitive device, determining an operability parameter value indicative of an operability of the capacitive device, and storing the operability parameter in a memory device; and in a normal operation mode, providing a bypass capacitance to the IC depending on a capacitance of one or more of the capacitive devices having an associated operability parameter value indicative of a non-defectiveness of the corresponding capacitive device.
An integrated circuit die, comprising:
A method of providing a bypass capacitance for an integrated circuit, comprising:
A method of operating an integrated circuit of an integrated circuit die including a bypass capacitor circuit including one or more capacitive devices, each arranged in a segment of a seal ring area of the integrated circuit die, said integrated circuit die comprising said integrated circuit having an interior region, the method comprising:
Dependencies are inferred from the claim text.