Semiconductor device having single layer substrate and method
AssigneeAmkor Technology, Inc.
InventorsHyung Il Jeon, Byong Jin Kim, Gi Jeong Kim, Jae Min Bae, Tae Ki Kim
Life of this patent
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Abstract
In one embodiment, a semiconductor device includes a single layer substrate having an insulation layer and conductive patterns on a first surface of the insulation layer. A semiconductor die is attached on a first surface of the single layer substrate and electrically connected to the conductive patterns. Conductive bumps are also on the first surface of the single layer substrate and electrically connected to the semiconductor die through the conductive patterns. An encapsulant overlaps at least portions of the first surface of the single layer substrate. The conductive bumps are at least partially exposed in the encapsulant.
Claims20
A semiconductor device comprising:
- a first single layer substrate having a first insulation layer and a plurality of first conductive patterns on a first surface of the first insulation layer;
- a first semiconductor die disposed adjacent a first surface of the first single layer substrate and electrically coupled to the plurality first conductive patterns;
- first conductive bumps disposed adjacent the first surface of the first single layer substrate and electrically coupled to the first semiconductor die through the plurality of first conductive patterns;
- and
- a first encapsulant covering the first surface of the first single layer substrate and covering portions of the first conductive bumps, wherein other portions of the first conductive bumps are exposed to the outside of the semiconductor device.
A semiconductor device comprising:
- a single layer substrate including a single insulation layer and a conductive pattern exposed on a first surface of the single insulation layer;
- a semiconductor die adjacent the first surface of the single insulation layer and electrically coupled to the conductive pattern, wherein the semiconductor die has a first major surface facing the single layer substrate and a second major surface opposite to the first major surface;
- a plurality of conductive bumps adjacent the first surface of the single insulation layer and electrically coupled to the conductive pattern, wherein distal ends of each of the plurality of conductive bumps are disposed further away from the single layer substrate than the second major surface of the semiconductor die;
- and
- a first encapsulant on the first surface of the single insulation layer, wherein the first encapsulant laterally surrounds portions of the plurality of conductive bumps, and wherein other portions of the conductive bumps are exposed to the outside of the semiconductor device.
A semiconductor device comprising:
- a first single layer substrate comprising:
- a first insulation layer having a first surface and a second surface opposite to the first surface and
- a plurality of first conductive patterns on a first surface of the first insulation layer;
- and
- a plurality of first conductive vias extending through the first surface and the second surface of the first insulation layer, wherein the plurality of first conductive patterns on the first surface of the first insulation layer are electrically coupled to the plurality of first conductive vias;
- a first semiconductor die on a first surface of the first single layer substrate and electrically coupled to the plurality first conductive patterns;
- first conductive bumps formed on the first surface of the first single layer substrate and electrically coupled to the first semiconductor die through the plurality of first conductive patterns;
- and
- a first encapsulant configured to cover the first surface of the first single layer substrate and configured to expose the first conductive bumps.
Dependencies are inferred from the claim text.