Semiconductor packaging structure

A semiconductor packaging structure, comprising:

• a semiconductor substrate having a first surface and a second surface;
• solder pads formed on the first surface of the semiconductor substrate;
• an insulating layer formed on the first surface of the semiconductor substrate, wherein the solder pads are exposed;
• an electroplating seed layer formed on the exposed solder pads and on the insulating layer on the first surface of the semiconductor substrate;
• a plurality of columnar electrodes formed over the electroplating seed layer, the columnar electrodes including first columnar electrodes over first portions of the electroplating seed layer on the exposed solder pads, and second columnar electrodes over second portions of the electroplating seed layer on the insulating layer;
• a diffusion barrier layer in a “U” shape with curled up edges formed to cover a top surface and sidewall of each columnar electrode and to cover a top surface of the each portion of the electroplating seed layer surrounding the columnar electrode;
• a wetting layer formed over the diffusion barrier layer on the first columnar electrodes and the second columnar electrodes, such that the wetting layer has a cross-section in a “U” shape with curled up edges;
• a first solder ball formed over the diffusion barrier layer on each first columnar electrode;
• and
• a packaging substrate having solder terminals corresponding to the solder balls,
• wherein the semiconductor substrate is mounted onto the packaging substrate in a flipped position, such that the first solder balls are connected with the solder terminals;
• and
• wherein after the diffusion barrier layer is formed, portions of the electroplating seed layer between adjacent columnar electrodes are removed to simultaneously form first columnar electrodes together with the “U” shaped wetting layer and the diffusion barrier layer thereon to electrically connect to the semiconductor substrate via a solder pad and the electroplating seed layer, and simultaneously form second columnar electrodes together with the “U” shaped wetting layer and the diffusion barrier layer thereon to electrically isolated from the semiconductor substrate by the insulating layer.