Wire bond through-via structure and method
AssigneePfg IP LLC
InventorsRandy Bindrup, W. Eric Boyd, John Leon, James Yamaguchi, Angel Pepe
Life of this patent
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Abstract
A stackable integrated circuit chip layer and module device that avoids the use of electrically conductive elements on the external surfaces of a layer containing an integrated circuit die by taking advantage of conventional wire bonding equipment to provide an electrically conductive path defined by a wire bond segment that is encapsulated in a potting material so as to define an electrically conductive wire bond “through-via” accessible from at least the lower or second surface of the layer.
Claims12
An electronic device comprising:
- a layer comprising a first surface and a second surface,
- an integrated circuit chip having an active surface with a bond pad and an inactive surface, and,
- a cross-section of an encapsulated wire bond segment in electrical connection with the bond pad and exposed on the second surface of the layer.
A method for making an electronic device comprising a set of steps of:
- bonding an inactive surface of an integrated circuit chip having a bond pad to a metalized surface of a substrate,
- disposing a wire bond loop having a predetermined height on the metalized surface at a predetermined location with respect to the bond pad,
- encapsulating a predetermined portion of the wire bond loop and the integrated circuit chip with an encapsulant to define a first surface and a second surface,
- removing a predetermined portion of the encapsulant and the wire bond loop from the first surface to define a wire bond segment having a first terminal end and a second terminal end,
- electrically connecting the bond pad to the first terminal end of the wire bond segment using a conductive lead assembly, and,
- exposing the second terminal end of the wire bond segment on the second surface.
An electronic device provided by a process comprising a set of steps of:
- bonding an inactive surface of an integrated circuit chip having a bond pad to a metalized surface of a substrate,
- disposing a wire bond loop having a predetermined height on the metalized surface at a predetermined location with respect to the integrated circuit chip,
- encapsulating a predetermined portion of the wire bond loop and the integrated circuit chip with an encapsulant to define a first surface and a second surface,
- removing a predetermined portion of the encapsulant and the wire bond loop on the first surface to define a wire bond segment having a first terminal end and a second terminal end,
- electrically connecting the bond pad to the first terminal end of the wire bond segment using a conductive lead assembly, and,
- exposing the second terminal end of the wire bond segment on the second surface.
Dependencies are inferred from the claim text.