Tunneling field effect transistor (TFET) formed by asymmetric ion implantation and method of making same

A method of forming an integrated circuit, the method comprising:

• forming a first masking layer over a gate feature, a first source/drain region, and a second source/drain region, the first source/drain region and the second source/drain region being on opposing sides of the gate feature;
• increasing an etch rate of the first masking layer over the first source/drain region such that a first etch rate of the first masking layer over the first source/drain region is different than a second etch rate of the first masking layer over the second source/drain region;
• removing the first masking layer over the first source/drain region;
• doping the first source/drain region with dopants of a first conductivity type;
• forming a second masking layer over the gate feature, the first source/drain region, and the second source/drain region;
• increasing an etch rate of the second masking layer over the second source/drain region such that a third etch rate of the second masking layer over the second source/drain region is different than a fourth etch rate of the second masking layer over the first source/drain region;
• removing the second masking layer over the second source/drain region;
• and
• doping the second source/drain region with dopants of a second conductivity type.

A method of forming an integrated circuit, the method comprising:

• forming a first masking layer over a gate feature, a first source/drain region, and a second source/drain region, the first source/drain region and the second source/drain region being on opposing sides of the gate feature;
• implanting ions in the first masking layer over the first source/drain region, the first masking layer over the second source/drain region being substantially free of the ions;
• removing the first masking layer over the first source/drain region, the first masking layer remaining over the second source/drain region;
• doping the first source/drain region with dopants having a first conductivity type;
• forming a second masking layer over the gate feature, the first source/drain region, and the second source/drain region;
• implanting ions in the second masking layer over the second source/drain region, the second masking layer over the first source/drain region being substantially free of the ions;
• removing the second masking layer over the second source/drain region, the second masking layer remaining over the first source/drain region;
• and
• doping the second source/drain region with dopants having a second conductivity type.