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US 9,431,107 B2Granted
Memory devices and methods of manufacture thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsAlexander Kalnitsky, Hsiao-Chin Tuan, Felix Ying-Kit Tsui, Hau-Yan Lu
Life of this patent
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Abstract
Memory devices and methods of manufacture thereof are disclosed. In one embodiment, a memory device includes a transistor having a gate disposed over a workpiece. The transistor includes a source region and a drain region disposed in the workpiece proximate the gate. The memory device includes an erase gate having a tip portion that extends towards the workpiece. The erase gate is coupled to the gate of the transistor.
Claims21
A memory device, comprising:
- a transistor including a gate disposed over a surface of a workpiece and a source region and a drain region disposed in the workpiece proximate the gate, the source region and the drain region each extending from the surface of the workpiece into the workpiece;
- and
- an erase gate including a tip portion that extends in a recess in the workpiece, the recess extending from the surface of the workpiece into the workpiece, wherein the erase gate directly contacts the gate of the transistor;
- and
- a coupling gate over the workpiece, the coupling gate directly contacting the gate of the transistor.
2 more elements
A memory device, comprising:
- a first capacitor;
- a second capacitor coupled in series with the first capacitor;
- and
- a transistor including a gate on a workpiece and source/drain regions disposed in the workpiece, the gate of the transistor being directly connected to a node in series between the first capacitor and the second capacitor, wherein the first capacitor includes a first plate disposed in the workpiece, a first insulating material disposed over the workpiece, and a second plate disposed over the first insulating material, and wherein the first plate is distinct from each of the source/drain regions, wherein the second plate of the first capacitor includes a tip portion that extends in a recess in the workpiece.
1 more element
A memory device comprising:
- a conductive electrode on a workpiece, the conductive electrode extending across a first region of the workpiece, a second region of the workpiece, and a third region of the workpiece;
- a first capacitor in the first region of the workpiece, the first capacitor comprising a first electrode in the workpiece and an erase gate electrode, the erase gate electrode being a first portion of the conductive electrode on the workpiece, the conductive electrode extending into a recess in the workpiece in the first region;
- a transistor in the second region of the workpiece, the transistor comprising a source/drain region in the workpiece and a gate, the gate being a second portion of the conductive electrode on the workpiece;
- and
- a second capacitor in the third region of the workpiece, the second capacitor comprising a second electrode in the workpiece and a coupling gate electrode, the coupling gate electrode being a third portion of the conductive electrode on the workpiece.
2 more elements
Dependencies are inferred from the claim text.