Package including a plurality of stacked semiconductor devices including a capacitance enhanced through via and method of manufacture
OwnerDarryl G. Walkerinventor
Life of this patent
Estimating the term…
Loading patent…
OwnerDarryl G. Walkerinventor
Estimating the term…
A plurality of semiconductor memory devices on a multi-chip package is disclosed. Each semiconductor device may include a plurality of through vias and a plurality of capacitance enhanced through vias. The through vias may provide an electrical connection for signals that may transition between logic states. The capacitance enhanced through vias may provide an electrical connection from a first side to a second side of the respective semiconductor device for transmission signals that remain substantially stable such as reference voltages, power supply voltages or the like. In this way, noise may be reduced and a reservoir of charge for circuits that provide a load for reference voltages and/or power supply voltages may be provided.
A package, comprising:
Dependencies are inferred from the claim text.