Bit-line sense amplifier capable of compensating mismatch between transistors, and semiconductor memory device including the same

A bit-line sense amplifier, comprising:

• a pull-up driving circuit connected between a power supply voltage line and a first driving power supply line, and configured to provide a first driving current on the first driving power supply line in response to an up control signal;
• a pull-down driving circuit configured to provide a second driving current on a second driving power supply line in response to a gate driving signal and a down control signal;
• and
• a latch-type sense amplifier connected between the first driving power supply line and the second driving power supply line, and configured to sense and amplify a voltage difference between a bit line and a complementary bit line,
• wherein a voltage level of a logic high level of the gate driving signal is changeable based on a reference voltage, a power supply voltage on the power supply voltage line, and the down control signal.

A semiconductor memory device comprising:

• a first bit line and a second bit line;
• and
• a bit-line sense amplifier connected between the first bit line and the second bit line, the bit-line sense amplifier including:
• a pull-up driving circuit connected between a power supply voltage line and a first driving power line, and configured to provide a pull-up current on the first driving power line in response to a pull-up control signal;
• a pull-down driving circuit connected between a second driving power line and a ground voltage line, and configured to provide a pull-down current on the second driving power line in response to a first driving signal;
• and
• a latch-type sense amplifier connected between the first driving power line and the second driving power line, and configured to sense and amplify a voltage difference between the first bit line and the second bit line,
• wherein a value of a logic high level of the first driving signal is changeable based on a reference voltage.