Circuit having a non-symmetrical layout
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJui-Lin Chen, Feng-Ming Chang, Huai-Ying Huang, Kian-Long Lim, Ping-Wei Wang
Life of this patent
Estimating the term…
Abstract
A circuit comprises a first voltage line, a second voltage line parallel to the first voltage line, and a bit line between the first voltage line and the second voltage line. The bit line is separated from the first voltage line by a minimum distance allowed by a design rule. The bit line is closer to the first voltage line than to the second voltage line. A first capacitance value between the bit line and the first voltage line is different than a second capacitance value between the bit line and the second voltage line.
Claims20
A circuit, comprising:
- a first voltage line;
- a second voltage line parallel to the first voltage line;
- and
- a bit line between the first voltage line and the second voltage line, the bit line being separated from the first voltage line by a minimum distance allowed by a design rule,
- wherein the bit line is closer to the first voltage line than to the second voltage line, and a first capacitance value between the bit line and the first voltage line is different than a second capacitance value between the bit line and the second voltage line.
A method of forming a circuit, the method comprising:
- laying out a first voltage line;
- laying out a second voltage line parallel to the first voltage line;
- laying out a bit line between the first voltage line and the second voltage line, the bit line being laid out parallel to the first voltage line, the bit line having a first side proximate to the first voltage line and a second side proximate to the second voltage line;
- and
- adjusting a position of at least one of the first side of the bit line or the second side of the bit line, causing the bit line to be closer to the first voltage line than to the second voltage line.
A method of forming a circuit, the method comprising:
- laying out a first voltage line, the first voltage line being laid out having a first width;
- laying out a second voltage line, the second voltage line being laid out having a second width;
- laying out a bit line between the first voltage line and the second voltage line, the bit line being laid out having a third width;
- constraining a first side of the bit line in a position based on a design rule associated with a distance between the first voltage line and the bit line;
- and
- expanding the bit line toward the second voltage line,
- wherein the first side of the bit line is constrained to keep the distance between the first voltage line and the bit line in compliance with the design rule during and after the bit line expands toward the second voltage line.
Dependencies are inferred from the claim text.