Fixing of semiconductor hold time

A computer program product embodied in a non-transitory computer readable medium, which when executed by a processor, causes the processor to perform design analysis and modification, the computer program product comprising instructions that when executed cause the processor to:

• estimate hold-time requirements for a semiconductor design based on ideal clocks;
• allocate placement regions for the design wherein the placement regions are to be used during hold-time fixing, wherein the allocating of placement regions to be used during hold-time fixing allows for access to pins on blocks within the design;
• wire track routes for the design wherein the wiring of track routes for hold-time critical nets is performed later than wiring of nets without hold-time violations;
• and
• modify the design by performing hold-time fixing on the design.

A computer system for design analysis and modification comprising:

• a memory which stores instructions;
• one or more processors coupled to the memory wherein the one or more processors are configured to:
• estimate hold-time requirements for a semiconductor design based on ideal clocks;
• allocate placement regions for the design wherein the placement regions are to be used during hold-time fixing, wherein the allocating of placement regions to be used during hold-time fixing allows for access to pins on blocks within the design;
• wire track routes for the design wherein the wiring of track routes for hold-time critical nets is performed later than wiring of nets without hold-time violations;
• and
• modify the design by performing hold-time fixing on the design.