Integrated circuit package and method
AssigneeNXP B.V.
InventorsJong Kim, James Spehar, Xu Zhang
Life of this patent
Estimating the term…
Abstract
Various example embodiments are directed to methods and apparatuses for implementing a circuit design within an integrated circuit (IC) package. A respective capacitance is determined for each die contact of a circuit design. A respective target inductance range is selected for each of the plurality of die contacts based on the determined capacitance. A segmentation of the circuit design is determined as a function of the target inductance ranges. The segmentation defines an implementation of the circuit design on a plurality of IC dies. The IC dies are placed at respective locations on the substrate, based on the resulting inductances of connections (e.g., conductive traces) between the die contacts and terminals of the IC package.
Claims18
A method for implementing a circuit design within an integrated circuit (IC) package having substrate and terminals for carrying signals communicated by the circuits of the circuit design, the method comprising:
- determining a respective capacitance of each die contact of a plurality of die contacts of a circuit design;
- selecting a respective target inductance range for each of the plurality of die contacts based on the determined capacitance of the die contact;
- determining as a function of the target inductance ranges, a segmentation of the circuit design that defines at least a first IC die and a second IC die;
- and
- placing the first and second IC dies at respective locations on the substrate, at which the inductance of each connection, from the plurality of die contacts to terminals of the IC package, is within the target inductance range of the corresponding die contact;
- wherein determining the segmentation of the circuit design that defines at least a first IC die and a second IC die includes:
- assigning an initial segmentation of the circuit design defining the first IC die and the second IC die;
- assigning an initial first location for the first IC die on the substrate and an initial second location for the second IC die on the substrate;
- for each connection from one of the plurality of the die contacts of the circuit design to a respective terminal of the IC package, calculating a characteristic inductance for the connection;
- and
- wherein placing the first and second IC dies at respective locations on the substrate includes, in response to the calculated characteristic inductance falling outside the target inductance range, laterally displacing at least one of the first and second IC dies on the substrate as a function of the calculated characteristic inductance.
Dependencies are inferred from the claim text.