Communication bus with zero power wake function

A bidirectional bus system, comprising:

• a two wire bidirectional bus;
• a bus master coupled to said two wire bidirectional bus;
• at least one slave node coupled to said two wire bidirectional bus, said at least one slave node further comprising:
• a first galvanic isolator coupled to a slave node microcontroller, wherein said first galvanic isolator transmits microcontroller generated digital data received from said slave node microcontroller to said two wire bidirectional bus;
• a second galvanic isolator coupled to said slave node microcontroller, wherein said second galvanic isolator receives bus master digital data from said two wire bidirectional bus and transmits said bus master digital data to said slave node microcontroller;
• a slave node power supply coupled to said slave node microcontroller and to said second galvanic isolator, wherein said slave node power supply is galvanically isolated from said two wire bidirectional bus;
• and
• a power supply switch coupled to said slave node power supply, said power supply switch further comprising:
• a first transistor, wherein said first transistor in a first transistor first state couples said slave node power supply to said slave node microcontroller and to said second galvanic isolator, and wherein said first transistor in a first transistor second state decouples said slave node power supply from said slave node microcontroller and from said second galvanic isolator;
• and
• a capacitor connected to said first transistor, wherein said capacitor maintains said first transistor in said first transistor second state when said capacitor is charged, and wherein said capacitor allows said first transistor to transition to said first transistor first state when said capacitor is discharged.