Systems and methods for supporting a plurality of load accesses of a cache in a single cycle
AssigneeSoft Machines, Inc.
InventorsKarthikeyan Avudaiyappan, Mohammad Abdallah
Life of this patent
Estimating the term…
Abstract
A method for supporting a plurality of load accesses is disclosed. A plurality of requests to access a data cache is accessed, and in response, a tag memory is accessed that maintains a plurality of copies of tags for each entry in the data cache. Tags are identified that correspond to individual requests. The data cache is accessed based on the tags that correspond to the individual requests. A plurality of requests to access the same block of the plurality of blocks causes an access arbitration that is executed in the same clock cycle as is the access of the tag memory.
Claims20
A method for supporting a plurality of accesses of a data cache, comprising:
- accessing a plurality of requests to access said data cache, wherein said data cache comprises a plurality of blocks;
- responsive to said plurality of requests to access said data cache, accessing a tag memory that maintains a plurality of copies of tags for each entry in said data cache and identifying tags that correspond to individual requests of said plurality of requests;
- and
- accessing said data cache based on said tags that correspond to said individual requests, wherein a plurality of requests to access a same block of said plurality of blocks causes an access arbitration that is executed in the same clock cycle as said accessing said tag memory and that determines, based on said requests to access said same block and without considering whether access to particular lines of said same block are requested, which of said individual requests is granted.
A cache system, comprising:
- a data cache divided into a plurality of data blocks;
- tag memory configured to maintain tags that correspond to a plurality of copies of tags that correspond to entries of said data cache;
- and
- a cache subsystem configured to access said tag memory and said data cache wherein arbitration operations related to a plurality of requests to access said data cache are executed in the same clock cycle as accesses of said tag memory wherein said arbitration operations determine, based on said requests to access a same block of said data cache, and without considering whether access to particular lines of said same block are requested which of said individual requests is granted.
A computer system, comprising:
- a memory;
- a processor;
- and
- a cache system, comprising:
- a data cache configured to store units of data;
- a tag memory configured to store tags that correspond to said units of data;
- and
- a cache controller comprising a system for supporting a plurality of accesses to said data cache, comprising:
- a request accessing component for accessing a plurality of requests to access said data cache, wherein said data cache comprises a plurality of blocks;
- a tag memory accessing component for accessing a tag memory that maintains a plurality of copies of tags for each entry in said data cache and identifying tags that correspond to individual requests of said plurality of requests;
- and a data cache accessing component for accessing said data cache based on said tags that correspond to said individual requests, wherein a plurality of requests to access a same block of said plurality of blocks causes an access arbitration that is executed in the same clock cycle as said accessing said tag memory wherein said access arbitration determines, based on said requests to access said same block, and without considering whether access to particular lines of said same block are requested which of said individual requests is granted.
Dependencies are inferred from the claim text.