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US 9,430,407 B2Granted
Method and system for secure storage and retrieval of machine state
AssigneeQUALCOMM Incorporated
InventorsJian Shen, Lew Go Chua-Eoan
Life of this patent
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Abstract
A machine state vector is received at a memory. The machine state vector has a machine state and a machine identifier. Write access qualification is met if the machine state entry is an initial write, or if the machine identifier matches the machine identifier of a stored machine state vector, and machine identifier and machine state are stored in the memory. A fetch machine state request is received, having a requestor machine identifier. A machine state retrieval qualification is met by the requestor machine identifier matching the stored machine identifier, and the machine state is retrieved.
Claims31
A method for secure storage of a machine state, comprising:
- receiving at a memory a machine state vector from a central processing unit (CPU), the machine state vector comprising a machine state and a machine identifier of the CPU, wherein the machine state is a state of the CPU identified by the machine identifier;
- determining by the memory, upon receiving the machine state vector, whether a write access qualification is satisfied, wherein the determining comprises:
- determining by the memory whether a writing of a machine state entry for the CPU identified by the machine identifier will be an initial write, wherein the initial write is the write of the machine state entry for the CPU identified by the machine identifier;
- and
- upon determining that the writing of the machine state entry will be the initial write, establishing by the memory the write access qualification as satisfied;
- upon determining that the write access qualification is satisfied, storing by the memory, a current valid machine state entry in the memory for the CPU based on the machine state vector, the current valid machine state entry for the CPU comprising the machine state of the CPU and, as a current machine identifier associated with the current valid machine state entry, the machine identifier of the CPU;
- receiving, at the memory, a fetch machine state request from the CPU, wherein the fetch machine state request includes a requestor machine identifier of the CPU;
- upon receiving the fetch machine request, determining by the memory whether a machine state retrieval qualification is met, wherein the machine state retrieval qualification includes the requestor machine identifier matching the current machine identifier associated with the current valid machine state entry stored in the memory;
- and
- upon determining that the requestor machine state retrieval qualification is met, sending by the memory a response packet to the CPU, the response packet including the machine state of the current valid machine state entry.
7 more elements
An apparatus for secure memory state storage, comprising:
- a memory configured to store a machine state entry, wherein the machine state entry includes an access security field and a machine state field, wherein the access security field is configured to hold a machine identifier and the machine state field is configured to hold a machine state;
- and
- a memory access logic configured to control access to the machine state entry in the memory, wherein the memory access logic is further configured to:
- receive a machine state vector from a central processing unit (CPU), wherein the machine state vector includes a machine state and a machine identifier of the CPU,
- determine, upon receiving the machine state vector, whether a write access qualification is satisfied,
- upon determining that the write access qualification is satisfied, store, in the memory, a current valid machine state entry for the CPU based on the machine state vector, the current valid machine state entry for the CPU comprising the machine state of the CPU, and, as a current valid machine identifier associated with the current valid machine state entry, the machine identifier of the CPU, in a manner retrievable based on the current valid machine identifier,
- receive a fetch machine state request from the CPU, wherein the fetch machine state request includes a requestor machine identifier of the CPU,
- upon receiving the fetch machine request from the CPU, determine whether a machine state retrieval qualification is met, wherein the machine state retrieval qualification includes the requestor machine identifier matching the current machine identifier associated with the current valid machine state entry stored in the memory, and
- upon determining that the requestor machine state retrieval qualification is met, send a response packet to the CPU, the response packet comprising the machine state of the current valid machine state entry.
6 more elements
An apparatus for secure memory state storage, comprising:
- means for receiving a machine state vector from a central processing unit (CPU), wherein the machine state vector includes a machine state and a machine identifier of the CPU, the machine state being a state of the CPU identified by the machine identifier;
- means for determining, upon receiving the machine state vector, whether a write access qualification is satisfied, wherein the means for determining includes:
- means for determining whether a writing of a machine state entry for the CPU to a memory will be an initial write, wherein the initial write is a write of the machine state entry for the CPU when the memory does not already currently store any current valid machine state entry, and
- means for establishing, upon determining that the writing of the machine state entry will be the initial write, that the write access qualification is satisfied;
- means for storing in the memory, upon the write access qualification being satisfied, a current valid machine state entry for the CPU based on the machine state vector, the current valid machine state entry for the CPU comprising the machine state of the CPU and, as a current machine identifier associated with the current valid machine state entry, the machine identifier of the CPU, in a manner retrievable based on the current machine identifier;
- means for receiving a fetch machine state request from the CPU, wherein the fetch machine state request includes a requestor machine identifier of the CPU;
- means for determining, upon receiving the fetch machine state request, whether a machine state retrieval qualification is met, wherein the machine state retrieval qualification includes the requestor machine identifier matching the current machine identifier associated with the current valid machine state entry stored in the memory;
- and
- means for sending, upon determining that the requestor machine state retrieval qualification is met, a response packet to the CPU, the response packet including a machine state of the current valid machine state entry.
6 more elements
A non-transitory computer-readable medium comprising code, which, when executed by a memory access control logic, causes the memory access control logic to perform operations for secure storage of a machine state, the non-transitory computer-readable medium comprising code for causing the memory access control logic to:
- receive a machine state vector from a central processing unit (CPU), wherein the machine state vector includes a machine state and a machine identifier of the CPU, the machine state being a state of the CPU identified by the machine identifier;
- determine, upon receiving the machine state vector, whether a write access qualification is satisfied, wherein the code for causing the memory access control logic to determine whether the write access qualification is satisfied comprises code for causing the processor memory access control logic to:
- determine whether a writing of a machine state entry for the CPU to a memory will be an initial write, wherein the initial write is a write of the machine state entry for the CPU when the memory does not already store a current valid machine state entry, and
- establish, upon determining that the writing of the machine state entry will be the initial write, that the write access qualification is satisfied;
- store in the memory, upon determining that the write access qualification is satisfied, a current valid machine state entry for the CPU based on the machine state vector, the current valid machine state entry for the CPU comprising the machine state for the CPU and, as a current valid machine identifier associated with the current valid machine state entry, the machine identifier of the CPU, in a manner retrievable based on the current machine identifier;
- receive a fetch machine state request from the CPU, wherein the fetch machine state request includes a requestor machine identifier of the CPU;
- upon receiving the fetch machine request, determine whether a machine state retrieval qualification is met, wherein the machine state retrieval qualification includes the requestor machine identifier matching the current machine identifier associated with the current valid machine state entry stored in the memory;
- and
- upon determining that the requestor machine state retrieval qualification is met, send a response packet to the CPU, the response packet including the machine state of the current valid machine state entry.
6 more elements
Dependencies are inferred from the claim text.