Processor and control method thereof
AssigneeFujitsu Limited
InventorMikio Hondo
Life of this patent
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AssigneeFujitsu Limited
InventorMikio Hondo
Estimating the term…
A processor includes a directory cache provided with a data cache, a memory directory to hold directory information, to hold dirty information indicating if held directory information is the same as that held in the memory directory, and local information indicating that the directory information of the memory directory is not held in a data cache of a different processor when the directory information from the memory directory is registered, and makes a setting such that the directory information of the memory directory is the same as directory information held in a data cache of a different processor as dirty information of the directory cache when the directory information of the directory cache and the local information of the directory cache indicate that the directory information of the memory directory is not held in the data cache of the different processor.
A processor connected to a different processor via an interconnection network and also connected to a main storage device, the processor comprising:
A control method of a processor, connected to a different processor via an interconnection network and also connected to a main storage device, including a data cache configured to hold data, a memory directory configured to hold directory information indicating that data stored in the main storage device is held in a data cache of a different processor and a directory cache configured to hold dirty information indicating whether or not held directory information is the same as the directory information held in the memory directory, the control method comprising:
Dependencies are inferred from the claim text.