Updating persistent data in persistent memory-based storage
AssigneeIntel Corporation
InventorsSanjay Kumar, Rajesh Sankaran, Subramanya Dulloor, Sheng Li
Life of this patent
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AssigneeIntel Corporation
InventorsSanjay Kumar, Rajesh Sankaran, Subramanya Dulloor, Sheng Li
Estimating the term…
A processor includes a processing core to execute an application including instructions encoding a transaction with a persistent memory via a volatile cache that includes a cache line associated with the transaction, the cache line being associated with a cache line status, and a cache controller operatively coupled to the volatile cache, the cache controller, in response to detecting a failure event, to, in response to determining that the cache line status that the cache line is committed, evict contents of the cache line to the persistent memory, and in response to determining that the cache line status indicating that the cache line is uncommitted, discard the contents of the cache line.
A processor comprising:
A system-on-a-chip (SoC) comprising:
A method comprising:
Dependencies are inferred from the claim text.