Managing memory transactions in a distributed shared memory system supporting caching above a point of coherency

A method of data processing in a processing unit including a processor core including a store-through upper level cache, an instruction execution unit, and a flag, the method comprising:

• responsive to the instruction execution unit executing in a memory transaction a transactional load instruction that speculatively binds to a value held in the store-through upper level cache:
• setting the flag;
• transmitting a transactional load operation to a store-in lower level cache that tracks a target cache line address of a target cache line containing the value;
• monitoring, during a core transactional memory tracking interval, the target cache line address for invalidation messages from the store-in lower level cache until the store-in lower level cache signals that the store-in lower level cache has assumed responsibility for tracking the target cache line address;
• responsive to receipt during the core transactional memory tracking interval of an invalidation message indicating presence of a conflicting snooped operation, resetting the flag;
• and
• at termination of the memory transaction, failing the memory transaction responsive to the flag being reset.