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US 9,430,372 B2Granted
Apparatus, method and system that stores bios in non-volatile random access memory
AssigneeIntel Corporation
InventorsMurugasamy K. Nachimuthu, Mohan Kumar
Life of this patent
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Abstract
A non-volatile random access memory (NVRAM) is used in a computer system to perform multiple roles in the platform storage hierarchy. The NVRAM is byte-rewritable and byte-erasable by the processor. The NVRAM is coupled to the processor to be directly accessed by the processor without going through an I/O subsystem. The NVRAM stores a Basic Input and Output System (BIOS). During a Pre-Extensible Firmware Interface (PEI) phase of the boot process, the cache within the processor can be used in a write-back mode for execution of the BIOS.
Claims14
An apparatus comprising:
- a processor that comprises one or more cores;
- a non-volatile memory (NVM) coupled to the processor via an I/O interface by the processor, the NVM having stored thereon a compressed Basic Input and Output System (BIOS) image;
- a cache within the processor;
- and a non-volatile random accessible memory (NVRAM) coupled to the processor and being byte-rewritable and byte-erasable by the processor, the NVRAM having stored thereon an uncompressed BIOS image, which is produced by the processor from the compressed BIOS image during a Pre-Extensible Firmware Interface (PEI) phase of a boot process, wherein execution of the uncompressed BIOS image places the cache in a write-back mode during the PEI phase of the boot process.
1 more element
An apparatus comprising:
- a processor that comprises one or more cores;
- a non-volatile random accessible memory (NVRAM) coupled to the processor and being byte-rewritable and byte-erasable by the processor, the NVRAM having stored thereon a plurality of BIOS images, one of the BIOS images to be executed by the processor during a Pre-Extensible Firmware Interface (PEI) phase of a boot process;
- and
- a cache within the processor, the cache operated in a write-back mode for execution of the one of the BIOS images during the PEI phase of the boot process.
1 more element
Dependencies are inferred from the claim text.