Processor power measurement
AssigneeTexas Instruments Incorporated
InventorJames H. Aliberti
Life of this patent
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Abstract
A system can include a processing core to execute machine readable instructions. The system can also include a memory accessible by the processor core. The memory can include preprogrammed test data that characterizes one of an impedance of a processor and a current output to the processor during execution of a test routine. The processor can include the processing core and the one of the impedance of the processor and the current output to the processor is based on a power measurement taken during execution of a test routine. The power measurement can be taken with a current sensor that is at least one of lossy or at least about 98% accurate.
Claims19
A system comprising:
- a processing core configured to execute machine readable instructions;
- and
- memory accessible by the processing core, wherein the memory includes preprogrammed test data that characterizes one of an impedance of a processor and a current output to the processor during execution of a test routine, wherein the processor includes the processing core, wherein the one of the impedance of the processor and the current output to the processor is based on a power measurement taken during execution of the test routine, wherein the power measurement is taken used to generate a calibration factor used during normal operation of the system to generate an accurate processor current measurement without need for a lossy current sensor.
A system comprising:
- a processing core configured to execute machine readable instructions;
- and
- memory accessible by the processing core, wherein the memory includes preprogrammed test data that characterizes one of an impedance of a processor and a current output to the processor during execution of a test routine, wherein the processor includes the processing core, wherein the one of the impedance of the processor and the current output to the processor is based on a power measurement taken during execution of the test routine, wherein the power measurement is taken with a current sensor that is at least one of lossy or at least about 98% accurate, further comprising:
- a voltage core regulator comprising a substantially lossless current sensor, the voltage core regulator being configured to:
- provide power to the processor;
- and
- output data that characterizes a real-time current output to the processor by the voltage core regulator, wherein the memory further comprises:
- a power test configured to:
- determine a calibration factor for the processor based on the test data and the real time current provided to the processor;
- and
- determine a calibrated power consumed by the processor based on the calibration factor and the real-time current provided to the processor.
A method comprising:
- executing a test routine on a processor that executes machine readable instructions;
- measuring, with a lossy current measuring device, a current provided to the processor during the test routine, wherein the test routine comprises a plurality of machine readable instructions;
- storing test data that characterizes the measuring in a memory;
- generating a calibration factor used during normal operation of the system generated accurate processor current measurement without need for a lossy current sensor.
A data center comprising:
- a plurality of computers that are each configured to store a power history, wherein a given power history of a given computer of the plurality of computers comprises a time-stamped instance of a calculated power consumed by the given computer;
- wherein the calculated power is based on a real-time measured current provided to the given computer and a calibration factor;
- wherein the calibration factor is based on test data characterizing one of an impedance of a processor of the given computer and a current provided to the processor of the given computer during execution of a test routine by the processor;
- and
- a data center controller configured to adjust a workload assigned to each of the computers based on the power history of each of the computers.
Dependencies are inferred from the claim text.