Throttling instruction issue rate based on updated moving average to avoid surges in DI/DT

A processing unit that includes one or more execution units for throttling an instruction issue rate of the processor according to a throttling rate, comprising:

• a scheduler configured to:
• receive one or more instructions to be issued to the one or more execution units,
• dispatch a subset of instructions included in the one or more instructions to the one or more execution units within a first number of clock cycles during a current scheduling period, wherein the instruction issue rate during the current scheduling period is defined by a number of clock cycles for which at least one instruction is dispatched,
• update an average of instructions issued based on the instruction issue rate during the current scheduling period, and
• update the throttling rate for a next scheduling period based on the average of instructions issued.

A computing device for throttling an instruction issue rate of a processor according to a throttling rate, comprising:

• a memory;
• and
• a processor coupled to the memory and including one or more execution units and a scheduler coupled to the one or more execution units, wherein the scheduler is configured to:
• receive one or more instructions to be issued to the one or more execution units,
• dispatch a subset of instructions included in the one or more instructions to the one or more execution units within a first number of clock cycles during a current scheduling period,
• update the throttling rate for a next scheduling period based on the instruction issue rate during the current scheduling period.