Multiplexed synchronous serial port communication with skew control for storage device

A method to implement communication between a controller and a preamplifier in a storage device, comprising:

• initiating reset of the preamplifier;
• following reset of the preamplifier, transmitting a synchronous clock signal over a clock signal line of a digital bus from the controller to the preamplifier, wherein the synchronous clock signal has a first frequency, and wherein the synchronous clock signal synchronizes transfer and processing of digital signals transmitted on a bidirectional serial data line of the digital bus;
• serially transmitting a digital control signal and a skew calibration stream on the bidirectional serial data line from the controller to the preamplifier, wherein the digital control signal instructs the preamplifier to measure skew between the synchronous clock signal transmitted on the clock signal line and the skew calibration stream transmitted on the bidirectional serial data line;
• in response to the digital control signal, the preamplifier measuring skew between the synchronous clock signal and the skew calibration stream;
• transmitting a skew measurement result from the preamplifier to the controller over the bidirectional serial data line, wherein the skew measurement result is transmitted synchronously with the synchronous clock signal at the first frequency;
• using the skew measurement result to align the synchronous clock signal to digital signals to be transmitted over the bidirectional serial data line;
• and
• following alignment, increasing a frequency of the synchronous clock signal from the first frequency to a second frequency, which is greater than the first frequency.

A storage device, comprising:

• a preamplifier;
• a controller;
• a digital bus comprising a clock signal line and a bidirectional serial data line connected between the preamplifier and the controller;
• multiplexing circuitry configured to control bidirectional transmission of digital signals between the controller and preamplifier over the bidirectional serial data line;
• a clock generator configured to generate a synchronous clock signal that is transmitted over the clock signal line of the digital bus from the controller to the preamplifier to synchronize transfer and processing of the digital signals transmitted over the bidirectional serial data line;
• and
• port logic circuitry configured to control the multiplexing circuitry and the clock generator, wherein the port logic circuitry is configured to control the multiplexing circuitry to selectively transmit digital signals in either a first direction from the controller to the preamplifier or a second direction from the preamplifier to the controller, in response to a direction control signal generated at the command of the port logic circuitry, wherein the direction control signal is transmitted from the controller to the preamplifier on one of the bidirectional serial data line and the clock signal line of the digital bus, wherein the direction control signal comprises a gap that is created in the synchronous clock signal by the clock generator, under command of the port logic circuitry, and wherein the preamplifier comprises gap detector circuitry configured to detect the gap in the synchronous clock signal and send gap detection results to the port logic circuitry to initiate a direction switch for transmitting digital signals in the second direction.