Array substrate, display panel and display device

An array substrate, comprising pixel units, wherein

• the pixel unit comprises four sub-pixel electrodes and at least one thin film transistor for controlling the four sub-pixel electrodes;
• domain alignments of the four sub-pixel electrodes within the pixel unit differ from each other, and domain alignments of the four sub-pixel electrodes within the pixel unit have a mirror-symmetrical distribution in up and down directions and in left and right directions,
• the array substrate further comprises:
• a plurality of gate lines, a plurality of data lines, and a plurality of network units formed by the gate lines and the data lines intersecting with each other;
• each of the network units comprises the thin film transistor and four sub-pixel electrodes having a same domain alignment but disconnected from each other;
• and
• with an intersection point of the gate line and the data line as a central point, four sub-pixel electrodes adjacent to the central point and respectively coming from four different network units adjacent to the central point and the thin film transistor for controlling the four sub-pixel electrodes form one pixel unit.