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US 9,429,645 B2Granted
Programmable wavelet tree
AssigneeTexas Instruments Incorporated
InventorsDomingo G. Garcia, Mohamed Mansour, Murtaza Ali
Life of this patent
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Abstract
An apparatus is provided. In the apparatus, a demultiplexer is configured to receive an input signal, and each of a plurality of sample buffers are coupled to the demultiplexer. A first multiplexer is coupled to each of the sample buffers. A filter is coupled to the first multiplexer. A bypass delay circuit is coupled to the first multiplexer, and a second multiplexer is coupled to the filter and the bypass delay circuit.
Claims8
An apparatus comprising:
- an input circuit;
- a compression circuit having a plurality of wavelet transform circuits, wherein each wavelet transform circuit includes:
- an addressing circuit;
- a bypass enable circuit having a bypass enable table;
- a memory circuit that is coupled to the addressing circuit;
- a plurality of wavelet circuits coupled in series within one another in a sequence, wherein the first wavelet circuit of the sequence is coupled to the input circuit, and wherein the last wavelet circuit of the sequence is coupled to the memory circuit, and wherein each wavelet enable circuit includes:
- a demultiplexer;
- a plurality of sample buffers, wherein each sample buffer is coupled to the demultiplexer;
- a first multiplexer that is coupled to each of the sample buffers;
- a filter that is coupled to the first multiplexer;
- a bypass delay circuit that is coupled to the first multiplexer;
- and
- a second multiplexer that is coupled to the filter, the bypass delay circuit, and the bypass enable circuit, wherein the second multiplexer is configured to be controlled by the bypass enable table;
- and
- an output circuit that is coupled to the memory circuit.
12 more elements
Dependencies are inferred from the claim text.