Analog signal test circuits and methods
AssigneeAltera Corporation
InventorsWeiqi Ding, Sergey Shumarayev
Life of this patent
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Abstract
An analog test network includes a conductor. The conductor is coupled to provide a first analog signal from a circuit under test to an analog-to-digital converter circuit. The analog-to-digital converter circuit is operable to generate a first digital signal based on the first analog signal. A control circuit is operable to generate a second digital signal based on the first digital signal. A digital-to-analog converter circuit is operable to generate a second analog signal based on the second digital signal. The conductor is coupled to provide the second analog signal from the digital-to-analog converter circuit to the circuit under test.
Claims20
A circuit comprising:
- a first circuit under test;
- an analog test network comprising a first conductor and a first multiplexer circuit;
- an analog-to-digital converter circuit, wherein the first multiplexer circuit is enabled in response to a first enable signal being asserted to provide a first analog signal from a node of the first circuit under test that is selected based on a first select signal through the first conductor to the analog-to-digital converter circuit, wherein the analog-to-digital converter circuit generates a first digital signal based on the first analog signal, and wherein the first multiplexer circuit is disabled from providing the first analog signal from the first circuit under test through the first conductor to the analog-to-digital converter circuit in response to the first enable signal being de-asserted;
- a control circuit to generate a second digital signal based on the first digital signal;
- and
- a digital-to-analog converter circuit to generate a second analog signal based on the second digital signal, wherein the first conductor is coupled to provide the second analog signal from the digital-to-analog converter circuit to the first circuit under test.
A circuit comprising:
- a first circuit under test;
- an analog test network comprising a first multiplexer circuit;
- an analog-to-digital converter circuit, wherein the analog test network provides a first analog signal from a node of the first circuit under test to the analog-to-digital converter circuit when the first multiplexer circuit is enabled in response to a first enable signal being asserted, wherein the first multiplexer circuit selects the node of the first circuit under test from at least two nodes based on a first select signal, wherein the analog-to-digital converter circuit generates a first digital signal based on the first analog signal, and wherein the first multiplexer circuit is disabled from providing the first analog signal from the first circuit under test to the analog-to-digital converter circuit in response to the first enable signal being de-asserted;
- a control circuit to generate a second analog signal based on the first digital signal;
- and
- a first conductor coupled to provide the second analog signal from an output of the control circuit directly to an input of the first circuit under test bypassing the analog test network.
A method comprising:
- providing a first analog signal from a first circuit under test to an analog-to-digital converter circuit through a first conductor in an analog test network;
- generating a first digital signal based on the first analog signal using the analog-to-digital converter circuit;
- generating a second digital signal based on the first digital signal using a control circuit;
- generating a second analog signal based on the second digital signal using a digital-to-analog converter circuit;
- providing the second analog signal from the first conductor in the analog test network to a first selected node of the first circuit under test using a first demultiplexer circuit that is enabled in response to a first enable signal being asserted, wherein the first demultiplexer circuit selects the first selected node of the first circuit under test from at least two nodes based on a first select signal;
- and
- disabling the first demultiplexer circuit from providing the second analog signal to the first circuit under test from the first conductor in response to the first enable signal being de-asserted.
Dependencies are inferred from the claim text.