Target mapping and implementation of abstract device model

A system comprising:

• a target computing device;
• and
• a hardware controller comprising a processor configured for data communication with the target computing device, wherein the hardware controller is configured to:
• map, using a Hardware Abstraction Layer (HAL) for the target computing device, to an existing architecture of the target computing device, an abstract candidate device model describing intended packet handling behaviors for the target computing device;
• identify supported behavior by determining, using the HAL, which of the intended packet handling behaviors is supported by the target computing device;
• and
• implement the identified supported behavior on the target computing device.

A non-transitory computer-readable medium storing computer instructions that, when executed by a computing processor, cause the computing processor to:

• map, using a Hardware Abstraction Layer (HAL) for a target computing device, to an existing architecture of the target computing device, an abstract candidate device model describing intended packet handling behaviors for the target computing device;
• identify supported behavior by determining, using the HAL, which of the intended packet handling behaviors is supported by the target computing device;
• and
• implement the identified supported behavior on the target computing device.