Generating multiple secure hashes from a single data buffer
AssigneeIntel Corporation
InventorsSean M. Gulley, Vinodh Gopal, Wajdi K. Feghali, James D. Guilford, Gilbert M. Wolrich, Kirk S. Yap
Life of this patent
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AssigneeIntel Corporation
InventorsSean M. Gulley, Vinodh Gopal, Wajdi K. Feghali, James D. Guilford, Gilbert M. Wolrich, Kirk S. Yap
Estimating the term…
One embodiment provides an apparatus. The apparatus includes a single instruction multiple data (SIMD) hash module configured to apportion at least a first portion of a message of length L to a number (S) of segments, the message including a plurality of sequences of data elements, each sequence including S data elements, a respective data element in each sequence apportioned to a respective segment, each segment including a number N of blocks of data elements and to hash the S segments in parallel, resulting in S segment digests, the S hash digests based, at least in part, on an initial value and to store the S hash digests; a padding module configured to pad a remainder, the remainder corresponding to a second portion of the message, the second portion related to the length L of the message, the number of segments and a block size; and a non-SIMD hash module configured to hash the padded remainder, resulting in an additional hash digest and to store the additional hash digest.
An apparatus, comprising:
A computing device, comprising:
A method, comprising:
A system comprising, one or more storage devices having stored thereon, individually or in combination, instructions that when executed by one or more processors result in the following operations comprising:
Dependencies are inferred from the claim text.