Adaptive error correction codes (ECCs) for electronic memories

A method, comprising:

• storing data at a plurality of address locations within a first memory, wherein each of the plurality of address locations has a number of storage bits configured to store data and one or more error correction bits corresponding to the data;
• storing an operation code at each of a plurality of entries of a second memory, each operation code relating to data stored at a corresponding address location in the first memory, wherein each operation code is usable to identify an error correction scheme used to generate one or more error correction bits in a corresponding address location of the first memory;
• determining that data stored at a given address location of the first memory includes a number of data corruption errors that exceeds a correction capability of a first correction scheme identified by a first operation code stored in a corresponding entry of the second memory;
• selecting a second correction scheme capable of correcting the number of data corruption errors;
• updating the corresponding entry of the second memory with a second operation code identifying the second correction scheme;
• and
• selecting the second correction scheme for data stored at another address location independently of whether the first correction scheme is capable of correcting data corruption errors in the other address location.

An electronic device, comprising:

• a controller;
• and
• a memory having program instructions stored thereon that, upon execution by the controller, cause the electronic device to:
• determine that data stored at a given address of a first memory has a number of data corruption errors that exceeds a correction capability of a first correction scheme identified by a first operation code stored in an entry of a second memory that corresponds to the address of the first memory;
• select a second correction scheme capable of correcting the number of data corruption errors, wherein the second correction scheme is computationally more complex than the first correction scheme;
• update the corresponding entry of the second memory with a second operation code identifying the second correction scheme;
• and
• select the second correction scheme for another address of the first memory independently of whether the first correction scheme is capable of correcting data corruption errors in the other address.