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US 9,425,826 B2Granted
Interleaver employing quotient-remainder reordering
AssigneeBlackBerry Limited
InventorDamian Kelly Harris-Dowsett
Life of this patent
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Abstract
A method of generating an interleaved symbol sequence location from a symbol location of a symbol sequence comprises determining the interleaved symbol location based on an interleaver sequence function which relates a linear symbol location to the interleaved symbol location. This is done by acquiring values of the interleaver sequence function in quotient and remainder form and then calculating the interleaved symbol location by performing operations of the interleaver sequence function in quotient and remainder form.
Claims16
A method of processing data within a data transceiver, the method comprising:
- receiving from a data interface of a data transceiver, a symbol sequence comprising an input data block;
- storing, based on the receiving, the symbol sequence in a receive buffer;
- determining, within a processor of the data transceiver based on the storing, an interleaved symbol location based on an interleaver sequence function which relates a linear symbol location to the interleaved symbol location by:
- acquiring parameters of the interleaver sequence function in quotient and remainder form with respect to a divisor value of wgs, where wgs equates to K/P, wherein K is code block size of the symbol sequence, P is a parallelization factor equivalent to the number of decoding processors, and P greater than 1,
- the parameters comprising constant f1 and constant f2 expressed in quotient and remainder form f1[q,r] and f2[q,r], wherein q is the quotient of f1 or f2 in integer form and r is the remainder of f1 or f2 in integer form with respect to a divisor value of wgs;
- calculating the interleaved symbol location Π(i)=(f1×i+f2×i2) mod wgs in quotient and remainder form, wherein i is the linear symbol location;
- storing a symbol from a linear symbol location i within an input data block of the receive buffer into the determined interleaved symbol location of an output data block of an output buffer;
- and
- transmitting, based on storing the symbol from a linear symbol location i, data in the output buffer through an output of the data transceiver.
6 more elements
A non-transitory computer readable medium having computer executable instructions stored thereon that, when executed by a processing circuit, cause the processing circuit to:
- receive from a data interface of a data transceiver, a symbol sequence comprising an input data block;
- store, based on the receiving, the symbol sequence in a receive buffer;
- determine, based on storing the symbol sequence, an interleaved symbol location based on an interleaver sequence function which relates a linear symbol location to the interleaved symbol location by:
- acquire parameters of the interleaver sequence function in quotient and remainder form with respect to a divisor value of wgs, where wgs equates to K/P, wherein K is code block size of the symbol sequence, P is a parallelization factor equivalent to the number of decoding processors, and P greater than 1,
- the parameters comprising constant f1 and constant f2 expressed in quotient and remainder form f1[q,r] and f2[q,r], wherein q is the quotient of f1 or f2 in integer form and r is the remainder of f1 or f2 in integer form with respect to a divisor value of wgs;
- calculate the interleaved symbol location Π(i)=(f1×i+f2×i2) mod wgs in quotient and remainder form, wherein i is the linear symbol location;
- store a symbol from a linear symbol location i within an input data block of the receive buffer into the determined interleaved symbol location of an output data block of an output buffer;
- and
- transmit, based on storing the symbol from a linear symbol location i, data in the output buffer through an output of the data transceiver.
6 more elements
A data processor, comprising:
- a data interface of a data transceiver configured to receive a symbol sequence comprising an input data block;
- a receiving buffer configured to store, based on receipt of the symbol sequence, the symbol sequence;
- a processing circuit configured to determine the interleaved symbol location based on an interleaver sequence function which relates a linear symbol location to the interleaved symbol location by:
- acquiring parameters of the interleaver sequence function in quotient and remainder form with respect to a divisor value of wgs, where wgs equates to K/P, wherein K is code block size of the symbol sequence, P is a parallelization factor equivalent to the number of decoding processors, and P greater than 1,
- the parameters comprising constant f1 and constant f2 expressed in quotient and remainder form f1[q,r] and f2[q,r], where q is the quotient of f1 or f2 in integer form and r is the remainder of f1 or f2 in integer form with respect to a divisor value of wgs;
- and
- calculating the interleaved symbol location Π(i)=(f1×i+f2×i2) mod wgs in quotient and remainder form, wherein i is the linear symbol location;
- wherein the processing circuit is further configured to:
- store a symbol from a linear symbol location i within an input data block of the receive buffer into the determined interleaved symbol location of an output data block of an output buffer;
- and
- transmit, based on storing the symbol from a linear symbol location i, data in the output buffer through an output of the data transceiver.
8 more elements
Dependencies are inferred from the claim text.