Back to results
US 9,425,811 B1Granted
Method and apparatus for compensating offset drift with temperature
AssigneeTexas Instruments Incorporated
InventorDipankar Mandal
Life of this patent
Estimating the term…
Abstract
The disclosure provides an analog to digital converter (ADC). The ADC includes a comparator that receives a threshold voltage. A set of elementary capacitors is coupled to the comparator, and receives one of an input voltage and a set of reference voltages. A set of M offset capacitors is coupled to the comparator, and receives one of a primary voltage and a secondary voltage, M is an integer. A difference in the primary voltage and the secondary voltage varies linearly with temperature.
Claims20
An analog to digital converter (ADC) comprising:
- a comparator configured to receive a threshold voltage;
- a set of elementary capacitors coupled to the comparator, and configured to receive one of an input voltage and a set of reference voltages;
- and
- a set of M offset capacitors coupled to the comparator, and configured to receive one of a primary voltage and a secondary voltage, M is an integer, wherein a difference in the primary voltage and the secondary voltage varies linearly with temperature.
1 more element
A method of compensating offset drift comprising:
- operating an analog to digital converter (ADC) in a set of trim phases, each trim phase of the set of trim phases comprising a sampling mode and a conversion mode, and each trim phase further comprising:
- providing an input voltage to a set of elementary capacitors in the ADC in the sampling mode;
- providing a set of reference voltages to the set of elementary capacitors in the ADC in the conversion mode;
- and
- providing one of a primary voltage and a secondary voltage to a set of M offset capacitors in the ADC, M is an integer, wherein a difference in the primary voltage and the secondary voltage varies linearly with temperature.
2 more elements
A computing device comprising:
- a processing unit;
- a memory module coupled to the processing unit;
- and
- a logic unit coupled to the processing unit and the memory module, the logic unit comprising an analog to digital converter (ADC), the ADC comprising:
- a comparator configured to receive a threshold voltage;
- a set of elementary capacitors coupled to the comparator, and configured to receive one of an input voltage and a set of reference voltages;
- and
- a set of M offset capacitors coupled to the comparator, and configured to receive one of a primary voltage and a secondary voltage, M is an integer, wherein a difference in the primary voltage and the secondary voltage varies linearly with temperature.
5 more elements
Dependencies are inferred from the claim text.