Apparatuses and methods for implementing various physically unclonable function (PUF) and random number generator capabilities

A system for implementing a PUF or random number generator capability comprising:

• a first section comprising
• a control system,
• a device test signal interface configured to interface with a first device under test, said first device under test comprising a plurality of bits comprising integrated circuits each including a capacitor;
• a user input/output interface system comprising an input system and a display;
• a recording medium and data storage section comprising a plurality of non-transitory machine readable instructions adapted for interacting with said user input/output interface system and controlling a plurality of equipment items comprising the control system/processor, device test signal interface, and controlling said device test signal interface interactions with said first device under test;
• wherein said plurality of non-transitory machine readable instructions comprise:
• a first plurality of non-transitory machine readable instructions configured for controlling said another equipment items to place the first device under test's bits in a first state with charge on selected bit capacitors;
• a second plurality of non-transitory machine readable instructions configured for controlling said another equipment items to stop bit refresh for a first predetermined time;
• a third plurality of non-transitory machine readable instructions configured for controlling said another equipment items to re-enable refresh for a second predetermined time to read and refresh charge on all bits;
• a fourth plurality of non-transitory machine readable instructions configured for controlling said another equipment items to read all bits and recording addresses of bits that have experienced bit flip from a first state to a second state comprising from “1” to “0” state;
• a fifth plurality of non-transitory machine readable instructions configured for controlling said another equipment items to perform selection of a plurality of said recorded addresses to generate and save a PUF or cryptographic key data;
• a sixth plurality of non-transitory machine readable instructions configured for controlling said another equipment items comprising computing a first percentage of said bits exhibiting said bit flip in said first device under test and saving said first percentage as a part of said PUF or cryptographic key data;
• and
• a seventh plurality of non-transitory machine readable instructions configured to generate a user interface on said display to enable a user to control said equipment items and said apparatus.

A system for implementing or manufacturing and using a Physically Unclonable Function (PUF) or random number generator capability comprising:

• a control system and a device test signal interface configured to interface with a first device under test, said first device under test comprising a plurality of bits comprising integrated circuits each including a capacitor;
• a user input/output interface system comprising an input system and a display;
• a recording medium and data storage section comprising a plurality of non-transitory machine readable instructions adapted for interacting with said user input/output interface system and controlling a plurality of equipment items comprising the control system/processor, device test signal interface, and controlling said device test signal interface interactions with said first device under test, wherein said plurality of non-transitory machine readable instructions comprise:
• a first plurality of non-transitory machine readable instructions configured for controlling said plurality of equipment items to place the first device under test's bits in a first state with charge on selected said bit capacitors;
• a second plurality of non-transitory machine readable instructions configured for controlling said plurality of equipment items to stop said first device under test's bit refresh for a first predetermined time;
• a third plurality of non-transitory machine readable instructions configured for controlling said plurality of equipment items to re-enable said first device under test's bit refresh for a second predetermined time to read and refresh charge on all said first device under test's bits;
• a fourth plurality of non-transitory machine readable instructions configured for controlling said plurality of equipment to read all said first device under test' bits and recording a plurality of first addresses of said first device under test's bits that have experienced bit flip from a first state to a second state comprising from “1” to “0” state;
• a fifth plurality of non-transitory machine readable instructions configured for controlling said plurality of equipment to select a plurality of said plurality of first recorded addresses to generate a first PUF or a cryptographic key data and storing said first PUF or said cryptographic key data in a first data structure on a data recording medium;
• and
• performing an operation comprising a test or verification operation with generated said first PUF or said cryptographic key data on a second device under test produced from a same manufacturing facility as the first device under test using said first PUF or said cryptographic key data, wherein said test or verification operation further comprising controlling said equipment to place the second device under test's bits in said first state with charge on selected said second device under test bit capacitors, stop said second device under test's bit refresh for said first predetermined time, re-enabling said second device under test's bit refresh for said second predetermined time to read and refresh charge on all said second device under test's bits, reading all said second device under test′ bits and recording a plurality of second addresses of said second device under test's bits that have experienced bit flip from said first state to said second state comprising from “1” to “0” state, selecting a plurality of said plurality of second recorded addresses to generate a second PUF or a cryptographic key data, and computing a second percentage of said bits exhibiting said bit flip in said second device under test and determining if said second percentage is within a predetermined range of said first percentage, outputting a result data indicating if said second percentage was within the said predetermined range of said first percentage to an operator or a data file.