High performance reconfigurable voltage buffers
AssigneeAnalog Devices, Inc.
InventorAhmed Mohamed Abdelatty Ali
Life of this patent
Estimating the term…
Abstract
In this disclosure, new structures for high-performance voltage buffers (source followers and emitter followers) are described. The structures achieve high performance (linearity) and reduce power consumption. In addition, they are reconfigurable to optimize the performance and power consumption depending on the input frequency range.
Claims21
A voltage buffer having a voltage input node and a voltage output node, the voltage buffer comprising:
- a source follower device comprising a first transistor device having a first terminal connected to the voltage input node and a second terminal connected to the voltage output node;
- a current source device connected to the second terminal of the source follower device for delivering bias current for the source follower device;
- and
- a bootstrap device configured to control the variation of the voltage across a third terminal and the second terminal of the source follower device, wherein the bootstrap device comprises a second transistor device having a source connected to a drain of the first transistor device and a gate connected to the voltage input node via a first level shifter or to the voltage output node via a second level shifter.
A voltage buffer having a voltage input node and a voltage output node, the voltage buffer comprising:
- a source follower device comprising a first transistor device having a first terminal connected to the voltage input node and a second terminal connected to the voltage output node;
- a further source follower device comprising having a first terminal connected to the voltage input node and a second terminal having a voltage following the voltage at the voltage input node;
- a current source device connected to the second terminal of the source follower device for delivering bias current for the source follower device;
- and
- a bootstrap device configured to control the variation of the voltage across a third terminal and the second terminal of the source follower device, wherein the bootstrap device comprises a second transistor device having a source connected to a drain of the first transistor device, and a gate connected to the second terminal of the further source follower device.
A voltage buffer having a voltage input node and a voltage output node, the voltage buffer comprising:
- a source follower device having a first terminal connected to the voltage input node and a second terminal connected to the voltage output node;
- a current source device connected to the second terminal of the source follower device for delivering bias current for the source follower device, said current source device comprising a first transistor device and a second transistor device, and a source of the first transistor device is connected to a drain of the second transistor device;
- a first current source;
- and
- a third transistor device;
- wherein the first transistor device of forms an active cascode device with the first current source and the third transistor device.
A voltage buffer having a voltage input node and a voltage output node, the voltage buffer comprising:
- a source follower device having a first terminal connected to the voltage input node and a second terminal connected to the voltage output node;
- a current source device connected to the second terminal of the source follower device for delivering bias current for the source follower device;
- a bootstrap device configured to control the variation of the voltage across the third terminal and the second terminal of the source follower device;
- and
- a first capacitor connected between the voltage input node and ground.
A reconfigurable voltage buffer having a voltage input node and a voltage output node, the reconfigurable voltage buffer comprising:
- a source follower device having a first terminal connected to the voltage input node and a second terminal connected to the voltage output node;
- a current source device for delivering bias current for the source follower device, comprising a first transistor device and a second transistor device in a cascode configuration, wherein a source of the first transistor device is connected to a drain of the second transistor device, and a drain of the first transistor device is connected to the second terminal of the source follower device;
- a first capacitor having a first terminal connected to the voltage input node;
- and
- one or more switches for reconfiguring one or more connections of the first capacitor comprising a first switch and a second switch, wherein, when the first switch is on, the first switch connects a second terminal of the first capacitor to ground, and when the second switch is on, the second switch connects a second terminal of the first capacitor to a source of a first transistor device and a drain of the second transistor device.
A reconfigurable voltage buffer having a voltage input node and a voltage output node, the reconfigurable voltage buffer comprising:
- a source follower device having a first terminal connected to the voltage input node and a second terminal connected to the voltage output node;
- a current source device for delivering bias current for the source follower device, comprising a first transistor device and a second transistor device, wherein a source of the first transistor device is connected to a drain of the second transistor device;
- a third transistor having a drain connected to a gate of the first transistor device;
- a current source;
- and
- a first switch and a second switch, wherein when the first switch is on, the first switch connects the gate of the third transistor device to the source of the first transistor device and the drain of the second transistor device, and when the second switch is on, the second switch connects the drain of the third transistor device to the current source.
A method for reconfiguring a voltage buffer having a voltage input node and a voltage output node, the method comprising:
- receiving a signal indicating one or more desired characteristics of the voltage buffer;
- generating control signals to control switches in the voltage buffer based on the signal;
- and
- configuring, using the control signals, the switches in the voltage buffer to include one or more of the following:
- a bypass capacitance at the voltage input node, feedforward distortion cancellation, and active cascode.
Dependencies are inferred from the claim text.