Back to results
US 9,425,794 B1Granted
Testing system for power delivery network
AssigneeGoogle Inc.
InventorsMark Omernick, Gregory Sizikov
Life of this patent
Estimating the term…
Abstract
Systems and apparatus for an integrated test tool for that utilizes reconfigurable hardware to assess power delivery quality. In one aspect, a method includes receiving, at a control logic block in a field programmable gate array (FPGA), a load current amplitude value and a load current frequency value; determining, by the control logic block, an activation modulation signal that causes each of a plurality of load cells to which it is applied to be in an active state for a first period of time and in an inactive state during a second period of time, and a first of number of load cells that when activated according to the activation modulation signal cause the FPGA to draw a load current at the load current amplitude.
Claims14
A method, comprising:
- iteratively receiving, at a control logic block in a field programmable gate array (FPGA), load current amplitude values and a load current frequency values, wherein for each iteration a particular load current amplitude value and a particular load current frequency value is received, and wherein at least two different load current amplitude values are received;
- for each iteration:
- determining, by the control logic block based on the load current amplitude value received and the load current frequency value received for the iteration:
- an activation modulation signal that causes each of a plurality of load cells to which it is applied to be in an active state for a first period of time and in an inactive state during a second period of time, wherein each load cell is in the FPGA and is configured to perform a set of operations at first clock frequency value of a first clock;
- and
- a first of number of load cells that when activated according to the activation modulation signal cause the FPGA to draw a load current at an amplitude that is specified by the load current amplitude value;
- selecting, by the control logic block, the first number of load cells in the FPGA;
- and
- providing, by the control logic block, the activation modulation signal to each selected load cells so that activation of each of the selected load cells is modulated according to the activation modulation signal, resulting in the FPGA drawing the load current at the load current amplitude value and at a frequency that is specified by the load current frequency value.
6 more elements
A system, comprising:
- a testing host system in data communication with a field programmable gate array (FPGA), the testing host system programmed to provide load current amplitude values and load current frequency values to the FPGA, and to monitor supply voltage and supply current in a power distribution network that provides power to the FPGA and associate monitored supply voltage values and supply current values with the load current amplitude values and load current frequency values provided to the FPGA;
- and
- an FPGA including a control logic block and load cells, wherein:
- the control logic block is configured to:
- iteratively receive load current amplitude values and a load current frequency values, wherein for each iteration a particular load current amplitude value and a particular load current frequency value is received, and wherein at least two different load current amplitude values are received;
- for each iteration, determine, based on the load current amplitude value received and the load current frequency value received for the iteration:
- an activation modulation signal that causes each of a plurality of load cells to which it is applied to be in an active state for a first period of time and in an inactive state during a second period of time, wherein each load cell is in the FPGA and is configured to perform a set of operations at a first clock frequency value of a first clock;
- a first of number of load cells that when in activated according to the activation modulation signal cause the FPGA to draw a load current at an amplitude that is specified by the load current amplitude value;
- select the first number of load cells in the FPGA;
- and
- provide the activation modulation signal to each selected load cells so that activation of each of the selected load cells is modulated according to the activation modulation signal, resulting in the FPGA drawing the load current at the load current amplitude value and at a frequency that is specified by the load current frequency value.
8 more elements
Dependencies are inferred from the claim text.