Circuit for generating bias voltage for high speed input/output pad
AssigneeAlphachips Corp.
InventorsJaewoo Park, Ook Kim
Life of this patent
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Abstract
The present invention provides a circuit for generating a bias voltage for a high speed input/output pad. To this end, a bias voltage generator according to an embodiment of the present invention is to supply at least one bias voltage to a buffer circuit connected to the pad, which includes: a bias generation part for generating a first bias voltage; and a reference voltage generation part for generating a voltage proportional to the pad voltage applied to the pad as a reference voltage, wherein the first bias voltage may be the sum of the reference voltage and a predetermined voltage.
Claims15
A circuit configured to supply at least one bias voltage to a buffer circuit connected to a pad, the circuit comprising:
- a bias voltage generator configured to generate a first bias voltage, wherein the at least one bias voltage comprises the first bias voltage;
- and
- a reference voltage generator configured to generate a reference voltage proportional to a pad voltage applied to the pad,
- wherein the first bias voltage is selectively a sum of the reference voltage and a predetermined threshold voltage,
- wherein the buffer circuit comprises a pull-up switching element, a pull-down switching element, and an N-type bias transistor connected between the pull-up switching element and the pull-down switching element,
- wherein the pad is connected to a contact node between the pull-up switching element and the N-type bias transistor, and
- wherein the at least one bias voltage is applied to a gate terminal of the N-type bias transistor.
Dependencies are inferred from the claim text.