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US 9,425,780 B1Granted
Apparatus and methods for anti-aliasing in electronic circuits
AssigneeAnalog Devices, Inc.
InventorEvgueni Ivanov
Life of this patent
Estimating the term…
Abstract
A circuit operating with a switching clock signal and a sampling clock signal can have one or more of its switching and sampling clock signals periodically phase-reversed. The period of phase reversal can be greater than twice the period of the original switching and/or sampling clock signal, and in certain configurations the switching and sampling clock signals can be synchronized. With a selection of phase reversal period (or frequency), aliasing frequency components of the mixed signal from the switching and sampling clock signals can be removed.
Claims20
An apparatus comprising:
- a switching circuit configured to receive a first clock signal and to generate an output signal, wherein the switching circuit comprises a first switch configured to receive the first clock signal, wherein the first clock signal is configured to control a switching operation of the switching circuit;
- a sampling circuit configured to receive a second clock signal and the output signal, wherein the sampling circuit comprises a second switch configured to receive the second clock signal, wherein the second clock signal is configured to control a sampling operation of the sampling circuit;
- and
- a first clock modification circuit configured to receive a first input clock signal and to generate a first modified clock signal by periodically reversing a phase of the first input clock signal, wherein the first modified clock signal comprises either the first clock signal or the second clock signal.
1 more element
A method comprising:
- receiving a first clock signal as an input to a switching circuit;
- controlling a switching operation of the switching circuit using the first clock signal;
- generating an output signal of the switching circuit based on the switching operation;
- receiving a second clock signal and the output signal as inputs to a sampling circuit;
- controlling a sampling operation of the sampling circuit using the second clock signal;
- and
- generating a first modified clock signal based on periodically reversing a phase of a first input clock signal, wherein the first modified clock signal comprises either the first clock signal or the second clock signal.
4 more elements
An apparatus comprising:
- a means for receiving a first clock signal, wherein the first clock signal is configured to control a switching operation;
- a means for generating an output signal from the switching operation based in part on the first clock signal;
- a means for receiving a second clock signal and the output signal, wherein the second clock signal is configured to control a sampling operation;
- and
- a means for receiving a first input clock signal and periodically reversing a phase of the first input clock signal to generate a first modified clock signal, wherein the first modified clock signal comprises either the first clock signal or the second clock signal.
2 more elements
Dependencies are inferred from the claim text.