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US 9,425,771 B2Granted
Low area flip-flop with a shared inverter
AssigneeTexas Instruments Incorporated
InventorsSuvam Nandi, Badarish Mohan Subbannavar
Life of this patent
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Abstract
A flip-flop is disclosed that utilizes low area. The flip-flop includes a tri-state inverter that receive a flip-flop input, a clock input and an inverted clock input. A master latch receives an output of the tri-state inverter. The master latch includes a common inverter. A slave latch is coupled to the master latch. The common inverter is shared between the master latch and the slave latch. An output inverter is coupled to the common inverter and generates a flip-flop output.
Claims20
A flip-flop comprising:
- a tri-state inverter configured to receive a flip-flop input, a clock input and an inverted clock input;
- a master latch configured to receive an output of the tri-state inverter, the master latch comprising a common inverter;
- an output inverter coupled to the common inverter and configured to generate a flip-flop output;
- and
- a slave latch coupled to the master latch, the slave latch comprising a slave tri-state inverter, the slave tri-state inverter configured to receive an output of the common inverter, wherein the common inverter is shared between the master latch and the slave latch, and the common inverter is configured to receive an output of the slave tri-state inverter.
2 more elements
An apparatus comprising:
- a clock input;
- a plurality of flip-flops configured to receive the clock input, wherein each of the flip-flop comprises:
- a tri-state inverter configured to receive a flip-flop input, the clock input and an inverted clock input;
- a master latch configured to receive an output of the tri-state inverter, the master latch comprising a common inverter;
- an output inverter coupled to the common inverter and configured to generate a flip-flop output;
- and
- a slave latch coupled to the master latch, the slave latch comprising a slave tri-state inverter, the slave tri-state inverter configured to receive an output of the common inverter, wherein the common inverter is shared between the master latch and the slave latch, and the common inverter is configured to receive an output of the slave tri-state inverter.
4 more elements
A method comprising:
- providing a tri-state inverter configured to receive a flip-flop input, a clock input and an inverted clock input;
- providing a master latch configured to receive an output of the tri-state inverter, the master latch comprising a common inverter;
- providing an output inverter coupled to the common inverter and configured to generate a flip-flop output;
- and
- providing a slave latch coupled to the master latch, the slave latch comprising a slave tri-state inverter, the slave tri-state inverter configured to receive an output of the common inverter, wherein the common inverter is shared between the master latch and the slave latch, and the common inverter is configured to receive an output of the slave tri-state inverter.
2 more elements
Dependencies are inferred from the claim text.