Gate driving circuit and array substrate

A gate driving circuit comprising a plurality of sets of gate driving units, wherein

• each set of gate driving units comprises m gate driving units, and m is an integer greater than 1;
• each set of gate driving units is configured to output a gate driving signal to a gate line;
• when one gate driving unit in a set of gate driving units malfunctions, said gate driving unit is configured to be terminated in operation and other gate driving units in the set of gate driving units are configured to maintain an operation of the set of gate driving units,
• wherein each of gate driving units comprises a gate driving module, a detection module and a control module, wherein
• the gate driving module comprise a first input port and a second input port, the first input port of the gate driving module is connected to a first clock signal, and the second input port of the gate driving module is connected to a second clock signal inverted to the first clock signal;
• when the detection module detects that there is a short-circuit between the first input port of the gate driving module and the second input port of the gate driving module, the detection module is configured to send a short-circuit signal to the control module;
• the control module is configured to disconnect a connection between the first input port of the gate driving module and the first clock signal as well as a connection between the second input port of the gate driving module and the second clock signal according to the short-circuit signal.