Power semiconductor device and method for fabricating the same
AssigneeDelta Electronics, Inc.
InventorsLi-Fan Lin, Wen-Chia Liao
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Abstract
A power semiconductor device and a method for fabricating the same are provided. The power semiconductor device includes a substrate and an active layer on the substrate. A gate electrode is disposed on the active layer. A first electrode and a second electrode are disposed on the active layer, on opposite sides of the gate electrode. A first metal pattern is coupled to the first electrode. A second metal pattern is coupled to the second electrode. A first insulating layer is disposed on the first and second metal patterns. A third metal pattern covers the first insulating layer, coupled to the second metal pattern. An interface between the third metal pattern and the first insulating layer is a substantially planar surface.
Claims21
A power semiconductor device, comprising:
- a substrate;
- an active layer disposed on the substrate;
- a gate electrode disposed on the active layer;
- a first electrode and a second electrode disposed on the active layer, on opposite sides of the gate electrode;
- a first metal pattern coupled to the first electrode;
- a second metal pattern coupled to the second electrode;
- a first insulating layer disposed on the first and second metal patterns;
- a second insulating layer directly contacting the gate electrode, and the first and second electrodes, wherein the gate electrode is separated from the first metal pattern by the second insulating layer;
- and
- a third metal pattern covering the first insulating layer, coupled to the second metal pattern,
- wherein an interface between the third metal pattern and the first insulating layer is a substantially planar surface, and
- wherein the first metal pattern directly contacts a top surface of the first electrode and the second insulating layer, and overlaps with the gate electrode.
Dependencies are inferred from the claim text.