Methods of forming alternative channel materials on FinFET semiconductor devices
AssigneeGlobalfoundries Inc.
InventorsAjey Poovannummoottil Jacob, Murat Kerem Akarvardar
Life of this patent
Estimating the term…
Abstract
One illustrative method disclosed herein includes forming a recessed fin structure and a replacement fin cavity in a layer of insulating material above the recessed fin structure, forming at least first and second individual layers of epi semiconductor material in the replacement fin cavity, wherein each of the first and second layers have different concentrations of germanium, performing an anneal process on the first and second layers so as to form a substantially homogeneous SiGe replacement fin in the fin cavity, and forming a gate structure around at least a portion of the replacement fin.
Claims25
A method, comprising:
- forming an initial fin structure in a semiconductor substrate;
- forming a layer of insulating material around said initial fin structure;
- performing a recess etching process to recess said initial fin structure and thereby define a recessed fin structure and a replacement fin cavity in said layer of insulating material above said recessed fin structure;
- forming at least first and second individual layers of epi semiconductor material in said replacement fin cavity, wherein each of said first and second layers have different concentrations of germanium;
- performing an anneal process on said first and second layers so as to form a substantially homogeneous SiGe replacement fin in said fin cavity;
- recessing said layer of insulating material so as to thereby expose at least an upper portion of said replacement fin;
- and
- forming a gate structure around at least a portion of said replacement fin exposed above said recessed layer of insulating material.
A method, comprising:
- forming an initial fin structure in a silicon substrate;
- forming a layer of insulating material around said initial fin structure;
- performing a recess etching process to recess said initial fin structure and thereby define a recessed fin structure and a replacement fin cavity in said layer of insulating material above said recessed fin structure;
- forming at least first and second individual layers of epi SiGe semiconductor material in said replacement fin cavity, wherein each of said first and second layers have different concentrations of germanium;
- performing a mixing thermal anneal process at a temperature that falls within the range of 700-1100° C. on said first and second layers so as to form a substantially homogeneous SiGe replacement fin in said fin cavity;
- recessing said layer of insulating material so as to thereby expose at least an upper portion of said replacement fin;
- and
- forming a gate structure around at least a portion of said replacement fin exposed above said recessed layer of insulating material.
A method, comprising:
- forming an initial fin structure in a silicon substrate;
- forming a layer of insulating material around said initial fin structure;
- performing a recess etching process to recess said initial fin structure and thereby define a recessed fin structure and a replacement fin cavity in said layer of insulating material above said recessed fin structure;
- forming at least first and second individual layers of epi SiGe semiconductor material in said replacement fin cavity, wherein each of said first and second layers have different concentrations of germanium;
- performing a condensation anneal process in an oxidizing process ambient at a temperature that falls within the range of 500-1100° C. on said first and second layers so as to form a substantially homogeneous SiGe replacement fin in said fin cavity;
- recessing said layer of insulating material so as to thereby expose at least an upper portion of said replacement fin;
- and
- forming a gate structure around at least a portion of said replacement fin exposed above said recessed layer of insulating material.
Dependencies are inferred from the claim text.