Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
AssigneeAcorn Technologies, Inc.
InventorsDaniel E. Grupp, Daniel J. Connelly
Life of this patent
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Abstract
An electrical device in which an interface layer comprising arsenic is disposed between and in contact with a conductor and a semiconductor. In some cases, the interface layer may be a monolayer of arsenic.
Claims18
An electrical junction, comprising an interface layer disposed between and in contact with a conductor and a semiconductor, the interface layer comprising arsenic and configured to reduce a height of a Schottky barrier between the conductor and the semiconductor from that which would exist at a junction between the conductor and the semiconductor without the interface layer disposed therebetween, and wherein the electrical junction has a specific contact resistance of less than or equal to approximately 100 Ω-μm2.
A field effect transistor, comprising a source, a drain, an n-type semiconductor channel region between the source and the drain, a gate proximate the semiconductor channel region, and an interface layer comprising arsenic between the source and the n-type semiconductor channel region, wherein the source comprises a material having a work function substantially equal to a conduction band energy of the semiconductor channel region.
An electrical junction, comprising an interface layer disposed between and in contact with a conductor and an a-type semiconductor, the interface layer comprising arsenic and a titanium oxide.
Dependencies are inferred from the claim text.