Non-planar SiGe channel PFET
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorKa-Hing Fung
Life of this patent
Estimating the term…
Abstract
Systems and methods are provided for fabricating a semiconductor device structure. An example semiconductor device structure includes a channel layer formed of a Germanium compound having a Germanium concentration B formed on a semiconductor substrate having a Germanium concentration of A, the Germanium concentration of the substrate A being less than the Germanium concentration of the channel layer B. The structure further includes a capping layer formed to separate the channel layer from a metal gate, the capping layer having a Germanium concentration of C, the Germanium concentration of the channel layer B being greater than the Germanium concentration of the capping layer C.
Claims20
A semiconductor device structure, comprising:
- a semiconductor substrate having a Germanium concentration and including a top surface;
- a metal gate including a bottom surface;
- a channel layer formed of a Germanium compound having a Germanium concentration and including a top surface and a bottom surface that is in contact with the top surface of the semiconductor substrate, wherein the top surface of the channel layer is at higher elevation than the bottom surface of the metal gate from a bottom surface of the semiconductor substrate, the Germanium concentration of the semiconductor substrate being less than the Germanium concentration of the channel layer;
- and
- a capping layer a portion of which is formed between the top and bottom surfaces of the channel layer to separate the channel layer from the metal gate, the capping layer having a Germanium concentration, the Germanium concentration of the channel layer being greater than the Germanium concentration of the capping layer.
A method of fabricating a semiconductor device structure, comprising:
- forming a channel layer of a Germanium compound having a Germanium concentration on a top surface of a semiconductor substrate having a Germanium concentration, the Germanium concentration of the semiconductor substrate being less than the Germanium concentration of the channel layer, the channel layer including top and bottom surfaces;
- and
- forming a portion of a capping layer between the top and bottom surfaces of the channel layer to separate the channel layer from a metal gate, the capping layer having a Germanium concentration, the Germanium concentration of the channel layer being greater than the Germanium concentration of the capping layer, wherein forming the channel layer is such that the bottom surface of the channel layer is in contact with the top surface of the semiconductor substrate and at higher elevation than a bottom surface of the metal gate from a bottom surface of the semiconductor substrate.
A semiconductor device structure, comprising:
- a semiconductor substrate including a top surface;
- a metal gate including a bottom surface;
- a channel layer formed of a Germanium compound having a Germanium concentration and including a bottom surface that is in contact with the top surface of the semiconductor substrate, wherein the top surface of the channel layer is at higher elevation than the bottom surface of the metal gate form a bottom surface of the semiconductor substrate;
- and
- a uni-axial stress inducing portion having a Germanium concentration formed above the semiconductor substrate and adjacent to the channel layer and configured to function as a source or drain of a transistor, the Germanium concentration of the uni-axial stress inducing portion being greater than the Germanium concentration of the channel layer.
Dependencies are inferred from the claim text.