US 9,425,225 B2Granted

Solid-state imaging device

AssigneePanasonic Intellectual Property Management Co., Ltd.

InventorYoshiyuki Matsunaga

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Abstract

Unit pixel cells each includes: a photoelectric conversion film; a transparent electrode; a pixel electrode; an amplification transistor; a reset transistor; and an element isolation STI and a leakage suppression region for electrically isolating the amplification transistor and the reset transistor, the first isolation region being in a silicon substrate, between the amplification transistor and the reset transistor, the reset transistor including: a gate electrode; and a drain region which is connected to the pixel electrode, and is in the silicon substrate, between the gate electrode and element isolation STI and the leakage suppression region, in which a depletion layer formed by a first PN junction between the drain region and its surrounding region and in contact with a surface of the silicon substrate is narrower than a depletion layer formed by a second PN junction between the drain region and its surrounding region and formed in the silicon substrate.

Claims33

Dependent claims

A solid-state imaging device comprising:

a semiconductor substrate having a first surface and a second surface opposite to the first surface;
and
unit pixel cells two-dimensionally arranged, each unit pixel cell including:
a photoelectric conversion film, above the first surface of the semiconductor substrate, for photo-electrically converting incident light;
a transparent electrode on the photoelectric conversion film;
a pixel electrode between the first surface of the semiconductor substrate and the photoelectric conversion film;
an amplification transistor, comprising a first gate electrode connected to the pixel electrode, for outputting a signal voltage according to a potential of the pixel electrode;
a reset transistor, comprising source or drain region of a first conductivity type in the semiconductor substrate and a second gate electrode, the source or drain region being connected to the pixel electrode for resetting a potential of the first gate electrode;
and
a first isolation region, comprising a first region of a second conductivity type in the semiconductor substrate, for electrically isolating the amplification transistor and the reset transistor, wherein
an impurity concentration of the first region is higher than an impurity concentration of a second conductivity type second region of the second conductivity type between the source or drain region and the second surface of the semiconductor substrate,
the source or drain region comprises a first impurity region coupled to the pixel electrode, and a second impurity region disposed between the first impurity region and the first region, and
an impurity concentration of the first impurity region is greater than an impurity concentration of the second impurity region.

10 more elements

A solid-state imaging device comprising:

a semiconductor substrate having a first surface and a second surface opposite to the first surface;
and
unit pixel cells two-dimensionally arranged, each unit pixel cell including:
a photoelectric conversion film, above the first surface of the semiconductor substrate, for photo-electrically converting incident light;
a transparent electrode on the photoelectric conversion film;
a pixel electrode between the first surface of the semiconductor substrate and the photoelectric conversion film;
an amplification transistor, comprising a first gate electrode connected to the pixel electrode and a first source or drain region, for outputting a signal voltage according to a potential of the pixel electrode;
a reset transistor, comprising a second source or drain region of a first conductivity type in the semiconductor substrate and a second gate electrode, the second source or drain region being connected to the pixel electrode for resetting a potential of the first gate electrode;
and
a first isolation region, comprising a first region of a second conductivity type in the semiconductor substrate, for electrically isolating the amplification transistor and the reset transistor, wherein
an impurity concentration of the first region is higher than an impurity concentration of a second region of the second conductivity type between the first source or drain region and the second surface of the semiconductor substrate,
a lowermost bottom of the first source or drain region of the amplification transistor is located shallower than a lowermost bottom of the second source or drain region of the reset transistor is, in the semiconductor substrate.

9 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/084,709Filed 20 Nov 2013 · continuation
Priority: JP 2011-11640324 May 2011
Published: US 2014/0077067 A120 Mar 2014
Granted: 23 Aug 2016
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

H10F 39/8037
Pixels having integrated switching, control, storage or amplification elements: the integrated elements comprising a transistor
H04N 25/65
Noise processing, e.g. detecting, correcting, reducing or removing noise: applied to reset noise, e.g. KTC noise related to CMOS structures by…
H10F 39/18
Image sensors: complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
H10F 39/807
Constructional details of image sensors: pixel isolation structures