Stackable microelectronic package structures

A microelectronic assembly, comprising:

• first and second microelectronic packages, each of the first and second microelectronic packages including:
• a substrate having first and second opposed surfaces, apertures extending between the first and second opposed surfaces, substrate contacts disposed at the first surface, and an interconnect area disposed at the first surface;
• first and second microelectronic elements each having element contacts facing the apertures and electrically connected with corresponding substrate contacts on the first surface, the first and second microelectronic elements being spaced apart from one another on the first surface and bounding the interconnect area;
• a plurality of contact pads having surfaces exposed at the second surface of the substrate, the surfaces of the contact pads defining package terminals electrically interconnected with the substrate contacts for connecting the package with a component external to the package;
• and
• a molded encapsulant layer overlying at least a portion of the first surface of the substrate and defining an encapsulant surface;
• wherein the second microelectronic package is bonded to the encapsulant surface of the first microelectronic package, the second microelectronic package including terminals facing the encapsulant surface;
• a plurality of first conductive vias extending at least through the molded encapsulant layer of the first microelectronic package and connecting the contact pads of the first microelectronic package and the terminals of the second microelectronic package;
• a plurality of second conductive vias extending at least through the molded encapsulant layer of the second microelectronic package, the second conductive vias having a first end adjacent the contact pads of the second microelectronic package and a second end adjacent the encapsulant surface of the second microelectronic package;
• and
• a conductive bonding material disposed between the first and second conductive vias and electrically connecting the first and second microelectronic packages.

A microelectronic assembly, comprising:

• a first microelectronic package, including:
• a substrate having first and second opposed surfaces and substrate contacts thereon;
• first and second microelectronic elements each having element contacts electrically connected with the substrate contacts, the first and second microelectronic elements being spaced apart from one another on the first surface so as to provide an interconnect area of the first surface between the first and second microelectronic elements;
• a plurality of package terminals at the second surface electrically interconnected with the substrate contacts for connecting the package with a component external to the package;
• and
• a plurality of stack terminals exposed at the first surface in the interconnect area for connecting the package with a component overlying the first surface of the substrate;
• and
• a second microelectronic package overlying the first microelectronic package and having terminals joined to the stack terminals of the first microelectronic package,
• first and second heat spreaders disposed between the first and second microelectronic packages, the first heat spreader being disposed on a first side of the interconnect area and the second heat spreader being disposed on a second side of the interconnect area with a gap being defined between the first and second heat spreaders, the stack terminals of the second microelectronic package being electrically connected with the stack terminals of the first microelectronic package through the gap.