Wafer-level package device with solder bump reinforcement
AssigneeMaxim Integrated Products, Inc.
InventorsReynante Alvarado, Yi-Sheng A. Sun, Arkadii V. Samoilov, Yong L. Xu
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AssigneeMaxim Integrated Products, Inc.
InventorsReynante Alvarado, Yi-Sheng A. Sun, Arkadii V. Samoilov, Yong L. Xu
Estimating the term…
Wafer-level package (semiconductor) devices are described that have a reinforcement layer formed on an adhesion layer and/or a semiconductor substrate and covering at least a portion of at least one solder bump. Additionally, the reinforcement layer may cover at least a portion of a semiconductor device (e.g., a die) mounted on the semiconductor substrate. In an implementation, the wafer-level package (semiconductor) device may include an integrated circuit chip with an attached die, where the integrated circuit chip has at least one solder bump formed thereon with a reinforcement layer formed on a surface of the integrated circuit chip, where the reinforcement layer embeds the die and covers a portion of the at least one solder bump.
A wafer-level package device, comprising:
A semiconductor device, comprising:
Dependencies are inferred from the claim text.