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US 9,425,146 B2Granted
Semiconductor structure and method for making same
AssigneeInfineon Technologies AG
InventorsThomas Fischer, Juergen Foerster, Werner Robl, Andreas Stueckjuergen
Life of this patent
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Abstract
One or more embodiments relate to a method for making a semiconductor structure, comprising: providing a workpiece; forming a barrier layer over the workpiece; forming a separation layer over the barrier layer; forming a conductive layer over the separation layer; and wet etching the conductive layer.
Claims20
A method for making a semiconductor structure, comprising:
- forming a barrier layer over a workpiece, said barrier layer comprising the chemical element W (tungsten);
- forming a separation layer over and in direct contact with said barrier layer, said separation layer essentially lacking the chemical element W (tungsten), said separation layer comprising at least one material from the group consisting of titanium metal, titanium alloy, titanium nitride, tantalum metal, tantalum alloy, or tantalum nitride;
- forming a conductive layer over and in direct contact with said separation layer, said conductive layer comprising the chemical element Cu (copper), wherein the conductive layer comprises more than 50% atomic percentage of copper;
- and
- wet etching said conductive layer selectively and stopping on the separation layer, wherein the wet etching is performed using an etchant that is chosen to be selective between the conductive layer and the separation layer, the etchant including phosphoric acid, acetic acid and nitric acid;
- and
- patterning the separation layer after wet etching the conductive layer.
4 more elements
A method for making a semiconductor structure, the method comprising:
- providing a semiconductor substrate, a top surface of the substrate comprising an inter-level dielectric layer;
- forming a barrier layer over and in direct contact with the inter-level dielectric layer, the barrier layer comprising the chemical element W (tungsten);
- forming a separation layer over and in direct contact with the barrier layer, the separation layer essentially lacking the chemical element W (tungsten);
- forming a conductive layer over and in direct contact with the separation layer the conductive layer comprising the chemical element Cu (copper), wherein the conductive layer comprises more than 50% atomic percentage of copper;
- forming a mask layer over the conductive layer;
- patterning the mask layer;
- and
- forming a plurality of metallization lines that are spaced apart electrically isolated from each other by:
- using a first etching process that uses a first etchant, wet etching the conductive layer selectively and stopping on the separation layer,
- using a second etching process that uses a second etchant different from the first etchant, patterning the separation layer selectively with respect to the etched conductive layer, wherein the metallization lines include a first electrical signal line for directing electrical signals in a horizontal direction relative to the top surface of the substrate and a second electrical signal line for directing electrical signals in the horizontal direction.
7 more elements
A method for making a semiconductor structure, the method comprising:
- providing a semiconductor substrate, a top surface of the substrate comprising an inter-level dielectric layer;
- forming a barrier layer having a thickness between 5 nm and 300 nm over and in direct contact with the inter-level dielectric layer, the barrier layer comprising the chemical element W (tungsten);
- forming a separation layer having a thickness between 10 nm and 500 nm over and in direct contact with the barrier layer, the separation layer essentially lacking the chemical element W (tungsten);
- forming a conductive layer having a thickness between 500 nm and 1500 nm over and in direct contact with the separation layer the conductive layer comprising the chemical element Cu (copper), wherein the conductive layer comprises more than 50% atomic percentage of copper;
- forming a mask layer over the conductive layer;
- patterning the mask layer;
- forming a plurality of metallization lines that are spaced apart electrically isolated from each other by
- using a first etching process that uses a first etchant comprising phosphoric acid, acetic acid, and nitric acid, wet etching the conductive layer selectively and stopping on the separation layer,
- using a second etching process that uses a second etchant comprising hydrofluoric acid, patterning the separation layer selectively with respect to the etched conductive layer, the metallization lines including a first electrical signal line for directing electrical signals in a horizontal direction relative to the top surface of the substrate and a second electrical signal line for directing electrical signals in the horizontal direction;
- and
- forming a second plurality of metallization lines overlying the plurality of metallization lines.
8 more elements
Dependencies are inferred from the claim text.