Package with multiple I/O side-solderable terminals
AssigneeNXP B.V.
InventorsChi Ho Leung, Wai Hung William Hor, Soenke Habenicht, Pompeo Umali, WaiKeung Ho, Yee Wai Fung
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AssigneeNXP B.V.
InventorsChi Ho Leung, Wai Hung William Hor, Soenke Habenicht, Pompeo Umali, WaiKeung Ho, Yee Wai Fung
Estimating the term…
Consistent with an example embodiment, there is leadless packaged semiconductor device having top and bottom opposing major surfaces and sidewalls extending there between. The leadless packaged semiconductor device comprises a lead frame sub-assembly having an array of two or more lead frame portions each having a semiconductor die arranged thereon. There are at least five I/O terminals wherein each of said terminals comprise a respective metal side pad wherein the respective metal side pad is disposed in a recess. A feature of this embodiment is that the each of the side pads is electroplated. The electroplated side pads accept solder and the solder menisci are contained by the recesses.
A lead frame sub-assembly for a leadless chip carrier (LCC), comprising:
A method for forming a semiconductor device in a leadless chip carrier (LCC) having a lead frame assembly having an array of lead frame sub-assemblies, each having a device die arranged thereon, the sub-assemblies having I/O terminals electrically connected to the device die, the I/O terminals mutually connected by a connection bar, and middle I/O terminal, located between two other I/O terminals, has an offset geometry, the method comprising:
A leadless packaged semiconductor device having top and bottom opposing major surfaces and sidewalls extending there between, the leadless packaged semiconductor device comprising:
Dependencies are inferred from the claim text.