Method for forming semiconductor structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYi-Nien Su, Hsiang-Wei Lin
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Abstract
One or more techniques or systems for forming a semiconductor structure having a gap are provided herein. In some embodiments, a gap is formed between a first etch stop layer (ESL) and an ESL seal region. For example, the gap is formed by removing a portion of a low-k (LK) dielectric region above an oxide region and removing the oxide region. In some embodiments, the oxide region below the LK dielectric region facilitates removal of the LK dielectric region, at least because the oxide region enhances a bottom etch rate of a bottom of the LK dielectric region such that the bottom etch rate is similar to a wall etch rate of a wall of the LK dielectric region.
Claims20
A method for forming a semiconductor structure, comprising:
- forming a first etch stop layer (ESL);
- forming an oxide region above the first ESL;
- forming a low-k (LK) dielectric region above the oxide region;
- forming a first metal line through at least one of the first ESL, the oxide region, or the LK dielectric region;
- forming a second metal line through at least one of the first ESL, the oxide region, or the LK dielectric region;
- forming a second ESL over at least one of the first metal line, the second metal line, or the LK dielectric region;
- removing at least a portion of the second ESL at least one of:
- over at least one of the first metal line or the second metal line;
- or
- between the first metal line and the second metal line;
- forming a gap by removing at least one of:
- at least a portion of the oxide region between the first metal line and the second metal line;
- or
- at least a portion of the LK dielectric region between the first metal line and the second metal line;
- and
- forming an ESL seal region over at least one of the second ESL, the first metal line, the second metal line, or the gap.
A method for forming a semiconductor structure, comprising:
- forming a first etch stop layer (ESL);
- forming an oxide region above the first ESL;
- forming a low-k (LK) dielectric region above the oxide region;
- forming a hard mask (HM) region above the LK dielectric region;
- patterning the HM region;
- etching at least one of a first trench, a second trench, or a contact space based on the patterned HM region:
- the first trench formed through at least one of the first ESL, the oxide region, or the LK dielectric region;
- the second trench formed through at least one of the first ESL, the oxide region, or the LK dielectric region;
- or
- the contact space formed through at least one of the first ESL, the oxide region, the LK dielectric region, or one or more additional regions;
- forming a first metal line by filling the first trench with metal;
- forming a second metal line by filling the second trench with metal;
- forming a via by filling the contact space with metal;
- forming a second ESL over at least one of the first metal line, the second metal line, the via, or the LK dielectric region;
- removing at least a portion of the second ESL at least one of:
- over at least one of the first metal line or the second metal line;
- or
- between the first metal line and the second metal line;
- forming a gap by removing at least one of:
- at least a portion of the oxide region between the first metal line and the second metal line;
- or
- at least a portion of the LK dielectric region between the first metal line and the second metal line;
- and
- forming an ESL seal region over at least one of the second ESL, the first metal line, the second metal line, the via, or the gap.
A method for forming a semiconductor structure, comprising:
- forming a first etch stop layer (ESL);
- forming an oxide region above the first ESL;
- forming a dielectric region above the oxide region;
- etching the first ESL, the oxide region, and the dielectric region to form a first trench and a second trench;
- forming a first metal line in the first trench;
- forming a second metal line in the second trench;
- forming a second ESL over the first metal line, the second metal line, and the dielectric region;
- removing a portion of the second ESL between the first metal line and the second metal line;
- removing a portion of the oxide region and a portion of the dielectric region between the first metal line and the second metal line to form a gap;
- and
- forming an ESL seal region over the first metal line, the second metal line, and the gap.
Dependencies are inferred from the claim text.